CD4512BMS datasheet(4/8 Pages) INTERSIL

tên linh kiện	CD4512BMS

Giải thích chi tiết về linh kiện	CMOS Dual 4-Bit Latch

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4 / 8 page

7-1183

Speciﬁcations CD4512BMS

Output Current (Source)

IOH10

VDD = 10V, VOUT = 9.5V

1, 2

+125oC

-

-0.9

mA

-55oC

-

-1.6

mA

Output Current (Source)

IOH15

VDD =15V, VOUT = 13.5V

1, 2

+125oC

-

-2.4

mA

-55oC

-

-4.2

mA

Input Voltage Low

VIL

VDD = 10V, VOH > 9V, VOL <

1V

1, 2

+25oC, +125oC,

-55oC

-3

V

Input Voltage High

VIH

VDD = 10V, VOH > 9V, VOL <

1V

1, 2

+25oC, +125oC,

-55oC

+7

-

V

Propagation Delay

Inhibit to Output

TPHL1

TPLH1

VDD = 10V

1, 2, 3

+25oC

-

140

ns

VDD = 15V

1, 2, 3

+25oC

-

100

ns

Propagation Delay

“A” Select ot Output

TPHL2

TPLH2

VDD = 10V

1, 2, 3

+25oC

-

170

ns

VDD = 15V

1, 2, 3

+25oC

-

120

ns

Propagation Delay

Data to Output

TPHL3

TPLH3

VDD = 10V

1, 2, 3

+25oC

-

150

ns

VDD = 15V

1, 2, 3

+25oC

-

110

ns

Propagation Delay

3-State Enable

TPHZ

TPZH

VDD = 10V

1, 2, 4

+25oC

-

60

ns

VDD = 15V

1, 2, 4

+25oC

-

40

ns

Propagation Delay

3-State Enable

TPLZ

TPZL

VDD = 10V

1, 2, 4

+25oC

-

60

ns

VDD = 15V

1, 2, 4

+25oC

-

40

ns

Transition Time

TTHL

TTLH

VDD = 10V

1, 2, 3

+25oC

-

100

ns

VDD = 15V

1, 2, 3

+25oC

-

80

ns

Input Capacitance

CIN

Any Input

1, 2

+25oC

-

7.5

pF

NOTES:

1. All voltages referenced to device GND.

2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized

on initial design release and upon design changes which would affect these characteristics.

3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

4. CL = 50pF, RL = 1K, Input TR, TF < 20ns.

TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER

SYMBOL

CONDITIONS

NOTES

TEMPERATURE

LIMITS

UNITS

MIN

MAX

Supply Current

IDD

VDD = 20V, VIN = VDD or GND

1, 4

+25oC-

25

µA

N Threshold Voltage

VNTH

VDD = 10V, ISS = -10

µA

1, 4

+25oC

-2.8

-0.2

V

N Threshold Voltage

Delta

∆VTN

VDD = 10V, ISS = -10

µA

1, 4

+25oC-

±1V

P Threshold Voltage

VTP

VSS = 0V, IDD = 10

µA

1, 4

+25oC

0.2

2.8

V

P Threshold Voltage

Delta

∆VTP

VSS = 0V, IDD = 10

µA

1, 4

+25oC-

±1V

Functional

F

VDD = 18V, VIN = VDD or GND

1

+25oC

VOH >

VDD/2

VOL <

VDD/2

V

VDD = 3V, VIN = VDD or GND

Propagation Delay Time

TPHL

TPLH

VDD = 5V

1, 2, 3, 4

+25oC

-

1.35 x

+25oC

Limit

ns

NOTES: 1. All voltages referenced to device GND.

2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

3. See Table 2 for +25oC limit.

4. Read and Record

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

PARAMETER

SYMBOL

CONDITIONS

NOTES

TEMPERATURE

LIMITS

UNITS

MIN

MAX

Số phần tương tự - CD4512BMS

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Renesas Technology Corp	CD4512BMS	332Kb / 8P	CMOS Dual 4-Bit Latch December 1992

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nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Intersil Corporation	CD4508BMS	85Kb / 9P	CMOS Dual 4-Bit Latch December 1992
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CD4512BMS bảng dữ liệu(PDF) 4 Page - Intersil Corporation

CD4512BMS bảng dữ liệu(HTML) 4 Page - Intersil Corporation

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