6

The output will continue to turn on and off for as long as the

shorted condition exists or until shutdown by the input logic.

The resulting frequency and duty cycle of the output current

flow is determined by the ambient temperature, the thermal

resistance of the package in the application and the total

power dissipation in the package. Since each output is inde-

pendently protected, the frequency and duty cycle of the cur-

rent flow into multiple shorted outputs will not be related in

time. Long lead lengths in the load circuit may lead to oscilla-

tory behavior if more than two output loads are shorted.

Since a diagnostic flag indicates when an output is shorted,

this information can be used as input to a microprocessor or

dedicated logic circuit to provide a fast switch-off when a

short occurs and, by sequence action, can be used to deter-

mine which output is shorted. A fault condition in any output

load will cause the FAULT output to switch to a logic “low”.

Since a fault condition may be detected during switching,

use of an appropriate size capacitor to filter the FAULT out-

put is recommended. The recommended FAULT output cir-

cuit is shown in Figure 2. This will prevent the FAULT output

voltage from reaching a logic level “0” within the maximum

switching time.

The FAULT detection circuitry compares the state of the

input and the state of the output for each A, B, C and D

channel. The output is considered to be in a high state if the

voltage exceeds the typical FAULT threshold reference volt-

output is considered to be in a low state. For example, if the

“ON” condition exists and the FAULT output is high. If the

load condition is indicated and the FAULT output is low.

normal “OFF” condition is indicated and the FAULT output is

open load condition exists and the FAULT output is low. The

Output Driver Fault Sense state is determined by high and

low comparator threshold limits which are defined in the

Fault Parameters section of the Electrical Specifications.

The FAULT output diagram of Figure 2 shows the circuit

component interface for sensing a diagnostic fault condition.

than the ON-OFF output switching times to avoid false fault

readings during switching. For applications requiring fast

period repetition rates, the maximum time constant should

be significantly less than the period of switching. The short-

est practical time constant is preferred to limit the duration of

a fault condition.

To match a standard CMOS or TTL interface, the switched

(EQ. 1)

As an example: Since TTL is the worst case for a low state,

calculated.

(EQ. 2)

is calculated using Equation 2. For example, using the mini-

which is more than suitable for CMOS or TTL Input switching

could be used for a better noise margin in the Low fault state.

To detect an open load, each output has an internal low-level

current sink, shown in Figure 3, which acts as a pull-down

under open load fault conditions and is always active. The mag-

nitude of this current plus any leakage associated with the out-

put transistor will always be less than 100

µA. (The data sheet

rent). The output load resistance must be chosen such that the

sink current flows through it under worse case conditions with

minimum supply voltage. For example, assume a 6.5V mini-

mum driver output supply voltage, a FAULT threshold reference

not result in a FAULT output low state when the output is OFF.

ZENER

CLAMP

4V

0.02

Ω

2

OUT A

FAULT SENSE

IS AN ACTIVE CURRENT SINK PULLDOWN FOR

OPEN-LOAD FAULT DETECTION. THE CURRENT

THE OUTPUT DRIVER

CA3272A, CA3292A