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AD5424 bảng dữ liệu(PDF) 9 Page - Analog Devices

tên linh kiện AD5424
Giải thích chi tiết về linh kiện  8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface
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AD5424 bảng dữ liệu(HTML) 9 Page - Analog Devices

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AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 8 of 28
9
12
DB4
DB1
10
11
DB3
DB2
1
2
3
4
5
6
7
8
20
13
14
15
16
17
18
19
AD5433
(Not to Scale)
IOUT1
IOUT2
GND
DB9
DB8
DB7
DB6
DB5
RFB
VREF
VDD
R/W
CS
NC
NC
DB0 (LSB)
NC = NO CONNECT
Figure 5. AD5433 Pin Configuration (TSSOP)
14
13
12
1
3
4
CS
15 R/W
NC
NC
11 DB0
GND
DB8
2
DB9
DB7
5
DB6
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO AGND.
AD5433
TOP VIEW
(Not to Scale)
Figure 6. AD5433 Pin Configuration (LFCSP)
Table 5. AD5433 Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
Description
1
19
IOUT1
DAC Current Output.
2
20
IOUT2
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
3
1
GND
Ground.
4 to 13
2 to 11
DB9 to DB0
Parallel Data Bits 9 to 0.
14, 15
12, 13
NC
Not Internally Connected.
16
14
CS
Chip Select Input. Active low. Use in conjunction with R/W to load parallel data to the input
latch or to read data from the DAC register. Rising edge of CS loads data.
17
15
R/W
Read/Write. When low, used in conjunction with CS to load parallel data. When high, use with CS
to read back contents of DAC register.
18
16
VDD
Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.
19
17
VREF
DAC Reference Voltage Input Terminal.
20
18
RFB
DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier
output.
Not applicable
EPAD
Exposed Pad. The exposed pad must be connected to AGND.


Số phần tương tự - AD5424_15

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Mô tả tương tự - AD5424_15

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