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AD1984 bảng dữ liệu(PDF) 11 Page - Analog Devices

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AD1984
Rev. 0
|
Page 11 of 20
|
January 2007
FILTER/REFERENCE
VREF _FILT
MIC_BIAS-B
MIC_BIAS-C
27
28
29
O
O
O
Voltage Reference Filter.
Switchable Microphone Bias. For use with Port B (Pins 21, 22).
Switchable Microphone Bias. For use with Port C (Pins 23, 24).
Both MIC bias pins are capable of Hi-Z, 0 V, 1.65 V, 3.7 V, and 3.9 V (with 5.0 V on
Pin 33), Hi-Z, 0 V, 1.65 V, 2.86 V, and 3.0 V (with 3.3 V on Pin 33).
DVCORE
1
O
CAUTION: DO NOT APPLY 3.3 V TO THIS PIN!
Filter connection for internal core voltage regulator. This pin must be connected to
filter caps: 10
μF, 1.0 μF, and 0.1μF connected in parallel between Pin 1 and
DVSS (Pin 7).
POWER AND GROUND
DVIO 3.3V
3
I
Link Digital I/O Voltage Reference. 3.3 V
DVSS
7
I
Digital supply return (ground).
DVDD 3.3 V
9
I
Digital supply voltage 3.3 V . This is regulated down to DVCORE on Pin 1 to supply the
internal digital core internal to the AD1984.
AVDD 3.3 V
25, 38
I
CAUTION: DO NOT APPLY 5 V TO THESE PINS!
Analog supply voltage 3.3 V ONLY.
Note: AVDD supplies should be well regulated and filtered as supply noise degrades
audio performance.
MIC_BIAS_IN
5.0 V or 3.3 V
33
I
Source power for microphone bias boost circuitry.
Connect this pin to 5.0 V via a low-pass filter. When connected this way the AD1984 is
capable of providing +3.9 V as a mic bias to all of the mic bias pins (except on
Pin 31).
If 5 V is not available, connect this pin to +3.3 V (AVDD) via a low-pass filter.
The AD1984 produces a mic bias voltage relative to the AVDD supply
(typically 3.0 V @ AVDD = 3.3 V).
AVSS
26, 42
I
Analog supply return (ground). AVSS should be connected to DVSS using a conductive
trace under, or close to, the AD1984.
Table 3. AD1984 Pin Descriptions (Continued)
Mnemonic
Pin No.
I/O
Description
The symbols used in this table are defined as: I = Input, O = Output, LI = Line Level Input, LO = Line Level Output, HP = Output capable of
driving headphone load, MIC = Input supports microphones with MIC bias and boost amplifier.


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