AD7010

REV. B

–6–

TERMINOLOGY

Error Vector Magnitude

This is a measure of the rms error vector introduced by the

AD7010 where signal error vector is defined as the rms devia-

tion of a transmitted symbol from its ideal position, as illustrated

in Figure 7, when filtered by an ideal RRC filter.

Gain Matching Between Channels

This is the Gain matching between the I and Q outputs, mea-

sured when transmitting all zeros.

Offset Vector Magnitude

This is a measure of the offset vector introduced by the AD7010

as illustrated in Figure 7. The offset vector is calculated so as to

minimize the rms error vector for each of the constellation points.

Output Signal Range and Differential Output Range

The output signal range is the output voltage swing and dc bias

level for each of the analog outputs. The Differential Output

Range is the difference between ITx and ITx for the I channel

and the difference between QTx and QTx for the Q Channel.

JDC Spurious Power

This is the rms sum of the spurious power measured at multi-

ples of 25 kHz, in a rectangular window of

±10.5 kHz, relative

to twice the rms power in a RRC window in the 0 kHz to

10.5 kHz band.

Signal Vector Magnitude

This is the radius of the IQ constellation diagram as illustrated

in Figure 7.

I

Q

ERROR VECTOR

OFFSET

VECTOR

0,0

SIGNAL VECTOR

Figure 7.

CIRCUIT DESCRIPTION

TRANSMIT SECTION

The transmit section of the AD7010 generates

π/4 DQPSK I

and Q waveforms in accordance with JDC specification. This is

accomplished by a digital

π/4 DQPSK modulator, which in-

cludes the Root-Raised Cosine filters (

α = 0.5), followed by two

10-bit DACs and on-chip reconstruction filters. The

π/4

DQPSK (Differential Quadrature Phase Shift Keying) digital

modulator generates 10-bit I and Q data in response to the

transmit data stream. The 10-bit I and Q DACs are filtered by

on-chip reconstruction filters, which also generate differential

analog outputs for both I and Q channels.

/4 DQPSK Modulator

The

π/4 DQPSK modulator generates 10-bit I and Q data (In-

phase and Quadrature) which are loaded into the I and Q 10-bit

transmit DACs.

Table II.

k

1

1

–3

π/4

01

3

π/4

00

π/4

10

–

π/4

Figure 8 shows the functional block diagram of the

π/4 DQPSK

modulator. The transmit serial data (TxDATA) is first con-

lel converter. The data is then differentially encoded; symbols

are transmitted as changes in phase rather than absolute phases.

Each symbol represents a phase change, as illustrated in Table

II, and this along with the previously transmitted symbol deter-

mines the next symbol to be transmitted. The differential phase

Di-bit symbols according to:

φ

∆φ

φ

∆φ

DIFFERENTIAL

PHASE

ENCODER

ROOT-RAISED

COSINE FILTER

I DATA

Q DATA

10

10

2-BIT

SERIAL TO

PARALLEL

CONVERTER

π/4 DQPSK DIGITAL MODULATOR

X

k

Y

k

I

k

Q

k

ROOT-RAISED

COSINE FILTER

TxDATA

Figure 8.

π/4 DQPSK Modulator Functional Block Diagram

Figure 9 illustrates the

π/4 DQPSK constellation diagram as de-

Cosine Filters (

α = 0.5), generating 10-bit I and Q data. The

FIR Root-Raised Cosine Filters have an impulse response of

±4 symbols.

I

Q

Figure 9.

π/4 DQPSK Constellation Diagram

Transmit Calibration

When the transmit section is brought out of sleep mode (Power

high), the transmit section initiates a self-calibration routine to

remove the offset between ITx and ITx and the offset between

QTx and QTx. READY goes high on the completion of the self-

calibration routine. Once READY goes high, BIN (Burst In)

can be brought high to initiate a transmit burst.

OBSOLETE