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STAC9704T bảng dữ liệu(PDF) 4 Page - Hynix Semiconductor |
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STAC9704T bảng dữ liệu(HTML) 4 Page - Hynix Semiconductor |
4 / 49 page SigmaTel, Inc STAC9704/7 4 10/02/98 Table of Contents – Tables Table 1 – Package Dimensions 5 Table 2 – Pin Designation 5 Table 3 – Digital Signal List 8 Table 4 – Analog Signal List 9 Table 5 – Filtering and Voltage References 10 Table 6 –Power Signal List STAC9704/07 11 Table 7 Table 8 – Mixer Functional Connections 22 Table 9 – Mixer Registers 24 Table 10 – Play Master Volume Register 25 Table 11 – PC Beep Register 26 Table 12 – Analog Mixer Input Gain Register 26 Table 13 – Record Select Control Registers 27 Table 14 – Record Gain Registers 28 Table 15 – General Purpose Register 28 Table 16 – 3D Control Register 29 Table 17 – Powerdown Status Register 30 Table 18 – Low Power Modes 30 Table 19 – Cold Reset 32 Table 20 – Warm Reset 33 Table 21 – Clocks 34 Table 22 – Data Setup and Hold 35 Table 23 – Signal Rise and Fall Times 36 Table 24 – AC-link Low Power Mode Timing 37 Table 25 – ATE Test Mode 37 Table 26 – Operating Conditions 38 Table 27 – Power Consumption 39 Table 28 – AC-link Static Specifications 39 Table 29 – 9704 Analog Performance Characteristics 40 Table 30 – 9707 Analog Performance Characteristics 42 Table of Contents – Figures Figure 1 – Package Outline 5 Figure 2 – STAC9704 Block Diagram 6 Figure 3 – Connection Diagram 7 Figure 4 – STAC9704/07 AC’97 Link 11 Figure 5 – AC’97 Bi-directional Audio Frame 14 Figure 6 – AC-link Audio Output Frame 15 Figure 7 – Start of an Audio Output Frame 15 Figure 8 – STAC9704/07 Audio Input Frame 18 Figure 9 – Start of an Audio Input Frame 18 Figure 10 – STAC9704 Powerdown Timing 20 Figure 11 – STAC9704/07 Mixer Functional Diagram 22 Figure 12 – Example of STAC9704/07 Powerdown/ Powerup flow 31 Figure 13 – STAC9704/07 Powerdown/Powerup with analog still alive 31 Figure 14 – Cold Reset 32 Figure 15 – Warm Reset 33 Figure 16 – Clocks 34 Figure 17 – Data Setup and Hold 35 Figure 18 – Signal Rise and Fall Times 36 Figure 19 – AC-link Low Power Mode Timing 36 Figure 20 – ATE Test Mode 37 |
Số phần tương tự - STAC9704T |
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Mô tả tương tự - STAC9704T |
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