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74AHCT32 bảng dữ liệu(PDF) 7 Page - NXP Semiconductors |
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74AHCT32 bảng dữ liệu(HTML) 7 Page - NXP Semiconductors |
7 / 14 page 74AHC_AHCT32_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 22 May 2008 7 of 14 NXP Semiconductors 74AHC32; 74AHCT32 Quad 2-input OR gate [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 11. Waveforms 74AHCT32; VCC = 4.5 V to 5.5 V tpd propagation delay nA, nB to nY; see Figure 6 [2] CL = 15 pF - 3.1 6.9 1.0 8.0 1.0 9.0 ns CL = 50 pF - 4.3 7.9 1.0 9.0 1.0 10.0 ns CPD power dissipation capacitance fi = 1 MHz; VI = GND to VCC [3] -12 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input to output propagation delays mna224 nA, nB input nY output tPLH tPHL GND VI VM VM VOH VOL Table 8. Measurement points Type Input Output VM VM 74AHC32 0.5 × V CC 0.5 × V CC 74AHCT32 1.5 V 0.5 × V CC |
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