công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
LM98722CCMTX bảng dữ liệu(PDF) 10 Page - Texas Instruments |
|
LM98722CCMTX bảng dữ liệu(HTML) 10 Page - Texas Instruments |
10 / 20 page LM98722 SNAS487A – SEPTEMBER 2009 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) The following specifications apply for VA = VD = VC = 3.3V, CL = 10pF, and fINCLK = 15MHz unless otherwise specified. Boldface limits apply for TA = TMIN to TMAX; all other limits TA = 25°C. Parameter Test Conditions Min(1) Typ(2) Max(1)(3) Units VCLP Reference Circuit Specifications VCLP Voltage 000 VCLP Voltage Setting = 000 0.85VA V VCLP Voltage 001 VCLP Voltage Setting = 001 0.9VA V VCLP Voltage 010 VCLP Voltage Setting = 010 0.95VA V VCLP Voltage 011 VCLP Voltage Setting = 011 0.6VA V VVCLP VCLP Voltage 100 VCLP Voltage Setting = 100 0.55VA V VCLP Voltage 101 VCLP Voltage Setting = 101 0.4VA V VCLP Voltage 110 VCLP Voltage Setting = 110 0.35VA V VCLP Voltage 111 VCLP Voltage Setting = 111 0.15VA V ISC VCLP DAC Short Circuit Output 0001 xxxxb VCLP Config. 30 mA Current Register = Black Level Offset DAC Specifications Resolution 10 Bits Monotonicity Ensured by characterization Offset Adjustment Range CDS Gain = 1x Referred to AFE Input Minimum DAC Code = 0x000 -614 mV Maximum DAC Code = 0x3FF 614 CDS Gain = 2x Minimum DAC Code = 0x000 -307 mV Maximum DAC Code = 0x3FF 307 Offset Adjustment Range Minimum DAC Code = 0x000 -17500 -16130 LSB Referred to AFE Output Maximum DAC Code = 0x3FF +16130 +17500 DAC LSB Step Size CDS Gain = 1x 1.2 mV Referred to AFE Output (32) (LSB) DNL Differential Non-Linearity -0.85 +0.74/ +2.4 LSB -0.37 INL Integral Non-Linearity -2.5 +0.72/ +2.5 LSB -0.56 PGA Specifications Gain Resolution 8 Bits Monotonicity Ensured by characterization Maximum Gain CDS Gain = 1x 7.7 8.3 8.8 V/V CDS Gain = 1x 17.7 18.4 18.9 dB Minimum Gain CDS Gain = 1x 0.58 0.64 0.70 V/V CDS Gain = 1x -4.7 -4.2 -3.5 dB PGA Function Gain (V/V) = (180/(277-PGA Code)) Gain (dB) = 20LOG10(180/(277-PGA Code)) Channel Matching Minimum PGA Gain 3 % Maximum PGA Gain 12.7 ADC Specifications VREFT Top of Reference 2.07 V VREFB Bottom of Reference 0.89 V VREFT - Differential Reference Voltage 1.06 1.18 1.30 V VREFB Overrange Output Code 65535 Underrange Output Code 0 10 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM98722 |
Số phần tương tự - LM98722CCMTX |
|
Mô tả tương tự - LM98722CCMTX |
|
|
Link URL |
Chính sách bảo mật |
ALLDATASHEET.VN |
Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |