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LM98714BCMT bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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LM98714BCMT bảng dữ liệu(HTML) 6 Page - Texas Instruments |
6 / 115 page LM98714 SNAS254A – OCTOBER 2006 – REVISED JANUARY 2014 www.ti.com PIN DESCRIPTIONS(1) (continued) Pin Name I/O Typ Res Description 36 DOUT1/ O D Bit 1 of the digital video output bus in CMOS Mode, LVDS Data Out0+ in LVDS Mode. TXOUT0+ 37 DOUT0/ O D Bit 0 of the digital video output bus in CMOS Mode, LVDS Data Out0- in LVDS Mode. TXOUT0- 38 DGND P Digital ground return. 39 VD P Power supply for the digital circuits. Bypass this supply pin with 0.1 μF capacitor. A single 4.7 μF capacitor should be used between the supply and the VD, VR and VC pins. 40 CLKOUT/ O D PD Output clock for registering output data when using CMOS outputs, or configurable CLK10 sensor control output. 41 CLK9 O D PD Configurable sensor control output. 42 CLK8 O D PD Configurable sensor control output. 43 CLK7 O D PD Configurable sensor control output. 44 CLK6 O D PU Configurable sensor control output. 45 CLK5 O D PD Configurable sensor control output. 46 DGND P Digital ground return. 47 VC P Power supply for the sensor control outputs. Bypass this supply pin with 0.1 μF capacitor. 48 CLK4 O D PD Configurable sensor control output. 6 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated Product Folder Links: LM98714 |
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