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ADS1203IPWT bảng dữ liệu(PDF) 4 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  16-Bit Resolution 14-Bit Linearity 짹250mV Input Range with Single 5V Supply
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ADS1203
SBAS318C − JUNE 2004 − REVISED JANUARY 2008
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating free-air temperature range at −40
°C to +125°C, AVDD = BVDD = +5V or VDD = +5V, VIN+ = −250mV to +250mV,
VIN− = 0V, Mode 3, MCLK input = 20MHz, and 16-bit Sinc3 filter, with OSR = 256, unless otherwise noted.
PARAMETER
UNITS
ADS1203I
TEST CONDITIONS
PARAMETER
UNITS
MAX
TYP(1)
MIN
TEST CONDITIONS
AC Accuracy
SINAD
Signal-to-noise + distortion
VIN =
±250mVPP at 5kHz
81
85
dB
SINAD
Signal-to-noise + distortion
VIN =
±250mVPP at 5kHz, TA = −40°C to +85°C
82.5
dB
SNR
Signal-to-noise ratio
VIN =
±250mVPP at 5kHz
81.5
85
dB
SNR
Signal-to-noise ratio
VIN =
±250mVPP at 5kHz, TA = −40°C to +85°C
83
dB
THD
Total harmonic distortion
VIN =
±250mVPP at 5kHz
−95
−87
dB
THD
Total harmonic distortion
VIN =
±250mVPP at 5kHz, TA = −40°C to +85°C
−88
dB
SFDR
Spurious-free dynamic range
VIN =
±250mVPP at 5kHz
88
95
dB
SFDR
Spurious-free dynamic range
VIN =
±250mVPP at 5kHz, TA = −40°C to +85°C
90
dB
Voltage Reference Output(6)
VOUT
Reference voltage output
2.440
2.5
2.560
V
dVOUT/dT
Reference voltage temperature
±30
ppm/
°C
dVOUT/dT
Reference voltage temperature
drift
TA = −40°C to +85°C
±20
ppm/
°C
Output voltage noise
f = 0.1Hz to 10Hz, CL = 10
µF
10
µVrms
Output voltage noise
f =10Hz to 10kHz, CL = 10
µF
12
µVrms
PSRR
Power-supply rejection ratio
60
dB
IOUT
Output current
10
µA
ISC
Short-circuit current
0.5
mA
Turn-on settling time
To 0.1% at CL = 0
100
µs
Voltage Reference Input(6)
VIN
Reference voltage input
0.5
2.5
2.6
V
Reference input resistance
20
k
Reference input capacitance
5
pF
Reference input current
1
µA
Digital Inputs(7)
Logic family
CMOS with Schmitt Trigger
VIH
High-level input voltage
0.7
×BVDD
BVDD+0.3
V
VIL
Low-level input voltage
−0.3
0.3
×BVDD
V
IIN
Input current
VIN = BVDD or GND
±50
nA
CI
Input capacitance
5
pF
Digital Outputs(7)
Logic family
CMOS
VOH
High-level output voltage
BVDD = 4.5V, IOH = −100
µA
4.44
V
VOL
Low-level output voltage
BVDD = 4.5V, IOL = +100
µA
0.5
V
CL
Load capacitance
30
pF
Data format
Bit Stream
(1) All typical values are at T
A = +25
°C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve
for VIN+ = −250mV to +250mV, expressed either as the number of LSBs or as a percent of measured input range (500mV).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) With reduced accuracy, the supported external clock frequency range is 1MHz up to 32MHz.
(6) Available only for QFN package.
(7) Applicable for 5.0V nominal supply: BV
DD = 4.5V to 5.5V.
(8) Applicable for 3.0V nominal supply: BV
DD = 2.7V to 3.6V.
(9) Measured with CLKOUT pin not loaded.


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