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ADC122S625 bảng dữ liệu(PDF) 8 Page - Texas Instruments

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tên linh kiện ADC122S625
Giải thích chi tiết về linh kiện  ADC122S625 Dual 12-Bit, 50 kSPS to 200 kSPS, Simultaneous Sampling A/D Converter
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ADC122S625 bảng dữ liệu(HTML) 8 Page - Texas Instruments

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ADC122S625
SNAS451A – FEBRUARY 2008 – REVISED MARCH 2013
www.ti.com
POSITIVE GAIN ERROR is the difference between the positive full-scale error and the offset error.
POWER SUPPLY REJECTION RATIO (PSRR) is a measure of how well a change in supply voltage is rejected.
PSRR is calculated from the ratio of the change in offset error for a given change in supply voltage, expressed in
dB. For the ADC122S625, VA is changed from 4.5V to 5.5V.
PSRR = 20 LOG (
ΔOffset / ΔVA)
(2)
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in dB, of the rms value of the input signal to the rms
value of the sum of all other spectral components below one-half the sampling frequency, not including
harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD) Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral components below half the clock frequency, including
harmonics but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the difference, expressed in dB, between the desired signal
amplitude to the amplitude of the peak spurious spectral component, where a spurious spectral component is
any signal present in the output spectrum that is not present at the input and may or may not be a harmonic.
TOTAL HARMONIC DISTORTION (THD) is the ratio of the rms total of the first five harmonic components at the
output to the rms level of the input signal frequency as seen at the output, expressed in dB. THD is calculated as
(3)
where Af1 is the RMS power of the input frequency at the output and Af2 through Af6 are the RMS power in the
first 5 harmonic frequencies.
THROUGHPUT TIME is the minimum time required between the start of two successive conversion.
8
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