SCLK

CS

SCLK

Z3

Z2

Z1

Z0

DB10

DONT

DONTC ADD2

ADD1

ADD0

DONTC DONTC DONTC

DB11

DB9

DB8

DB1

16

8

7

6

5

4

3

2

1

DB0

DIN

DOUT

SCLK

CS

200 PA

200 PA

1.6V

To Output Pin

35 pF

ADC122S051

www.ti.com

SNAS257E – NOVEMBER 2004 – REVISED MARCH 2013

Figure 2. Timing Test Circuit

Figure 3. Serial Timing Diagram

Figure 4. SCLK and CS Timing Parameters

Specification Definitions

ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold

capacitor to charge up to the input voltage.

APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the

input signal is acquired or held for conversion.

CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input

voltage to a digital word.

CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy

from one analog input that appears at the measured analog input.

DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1

LSB.

DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The

specification here refers to the SCLK.

Copyright © 2004–2013, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Links: ADC122S051