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ADS804E1KG4 bảng dữ liệu(PDF) 9 Page - Texas Instruments

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ADS804
9
SBAS068B
www.ti.com
DC voltage differences between the IN and IN inputs of the
ADS804 effectively will produce an offset, which can be
corrected for by adjusting the values of resistors R1 and R2.
The bias current of the op amp may also result in an
undesired offset. The selection criteria of the appropriate op
amp should include the input bias current, output voltage
swing, distortion, and noise specification. Note that in this
example the overall signal phase is inverted. To re-establish
the original signal polarity it is always possible to interchange
the IN and IN connections.
SINGLE-ENDED-TO-DIFFERENTIAL
CONFIGURATION (TRANSFORMER COUPLED)
In order to select the best suited interface circuit for the
ADS804, the performance requirements must be known. If
an ac-coupled input is needed for a particular application, the
next step is to determine the method of applying the signal;
either single-ended or differentially. The differential input
configuration may provide a noticeable advantage of achiev-
ing good SFDR performance based on the fact that in the
differential mode, the signal swing can be reduced to half of
the swing required for single-ended drive. Secondly, by
driving the ADS804 differentially, the even-order harmonics
will be reduced. Figure 3 shows the schematic for the
suggested transformer-coupled interface circuit. The resistor
across the secondary side (RT) should be set to get an input
impedance match (e.g., RT = n2 • RG).
REFERENCE OPERATION
Integrated into the ADS804 is a bandgap reference circuit
including logic that provides either a +1V or +2.5V reference
output, by simply selecting the corresponding pin-strap con-
figuration. Different reference voltages can be generated by
the use of two external resistors, which will set a different
FIGURE 2. DC-Coupled, Single-Ended Input Configuration with DC-Level Shift.
gain for the internal reference buffer. For more design flexibil-
ity, the internal reference can be shut off and an external
reference voltage used. Table I provides an overview of the
possible reference options and pin configurations.
FIGURE 3. Transformer-Coupled Input.
V
IN
IN
IN
CM
22
22
100pF
R
T
100pF
+
4.7µF
0.1µF
ADS804
1:n
0.1µF
R
G
INPUT
FULL-SCALE
REQUIRED
MODE
RANGE
VREF
CONNECT
TO
Internal
2Vp-p
+1V
SEL
VREF
Internal
5Vp-p
+2.5V
SEL
GND
Internal
2V
≤ FSR < 5V
1V < VREF < 2.5V
R1
VREF and SEL
FSR = 2 • VREF
VREF = 1 + (R1/R2)R2
SEL and Gnd
External
1V < FSR < 5V
0.5V < VREF < 2.5V
SEL
+VS
VREF
Ext. VREF
TABLE I. Selected Reference Configuration Examples.
V
IN
2Vp-p
0
+1V
–1V
R
F
R
IN
NOTE: R
F = RIN, G = –1
+V
S
ADS804
R
S
24.9
2k
100pF
10
µF
+
+2.5V
R
2
R
1
2k
IN
IN
REFB
(+1V)
V
REF
SEL
REFT
0.1
µF
0.1
µF
OPA691
+V
S


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