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ADS8515 bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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ADS8515 bảng dữ liệu(HTML) 5 Page - Texas Instruments |
5 / 23 page ADS8515 www.ti.com SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010 PIN DESCRIPTIONS PIN DIGITAL NAME NO. I/O DESCRIPTION AGND1 2 Analog ground. Used internally as ground reference point. AGND2 5 Analog ground. At the start of a conversion, BUSY goes low and stays low until the conversion is BUSY 26 O completed and the digital outputs have been updated. BYTE 23 I Selects 8 most significant bits (low) or 8 least significant bits (high). CAP 4 Reference buffer capacitor. 2.2-mF tantalum capacitor to ground. CS 25 I Internally ORed with R/C. If R/C low, a falling edge on CS initiates a new conversion. DGND 14 Digital ground. Data bit 15. Most significant bit (MSB) of conversion results. Hi-Z state when CS is high, or D15 (MSB) 6 O when R/C is low. D14 7 O Data bit 14. Hi-Z state when CS is high, or when R/C is low. D13 8 O Data bit 13. Hi-Z state when CS is high, or when R/C is low. D12 9 O Data bit 12. Hi-Z state when CS is high, or when R/C is low. D11 10 O Data bit 11. Hi-Z state when CS is high, or when R/C is low. D10 11 O Data bit 10. Hi-Z state when CS is high, or when R/C is low. D9 12 O Data bit 9. Hi-Z state when CS is high, or when R/C is low. D8 13 O Data bit 8. Hi-Z state when CS is high, or when R/C is low. D7 15 O Data bit 7. Hi-Z state when CS is high, or when R/C is low. D6 16 O Data bit 6. Hi-Z state when CS is high, or when R/C is low. D5 17 O Data bit 5. Hi-Z state when CS is high, or when R/C is low. D4 18 O Data bit 4. Hi-Z state when CS is high, or when R/C is low. D3 19 O Data bit 3. Hi-Z state when CS is high, or when R/C is low. D2 20 O Data bit 2. Hi-Z state when CS is high, or when R/C is low. D1 21 O Data bit 1. Hi-Z state when CS is high, or when R/C is low. Data bit 0. Least significant bit (LSB) of conversion results. Hi-Z state when CS is high, or D0 (LSB) 22 O when R/C is low. With CS low and BUSY high, a falling edge on R/C initiates a new conversion. With CS R/C 24 I low, a rising edge on R/C enables the parallel output. REF 3 Reference input/output. 2.2-mF tantalum capacitor to ground. Analog supply input. Nominally +5 V. Decouple to ground with 0.1-mF ceramic and 10-mF VANA 27 tantalum capacitors. VDIG 28 Digital supply input. Can be connected directly to pin 27. VIN 1 Analog input. See Figure 24. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): ADS8515 |
Số phần tương tự - ADS8515_14 |
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Mô tả tương tự - ADS8515_14 |
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