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TS2DDR2811 bảng dữ liệu(PDF) 7 Page - Texas Instruments |
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TS2DDR2811 bảng dữ liệu(HTML) 7 Page - Texas Instruments |
7 / 14 page CL (see Note A) TEST CIRCUIT S1 2 × VCC Open GND RL RL VOH VOL VOLTAGE WAVEFORMS OUTPUT SKEW (tsk(o)) Data Out at YB1 or YB 2 50 Ω VG1 VCC DUT 50 Ω VSEL 50 Ω VG2 50 Ω VI TEST RL S1 CL 3.3 V ± 0.3 V VCC Vin tsk(p) tsk(o) 3.3 V ± 0.3 V Open Open 200 Ω 200 Ω VCC or GND VCC or GND 10 pF 10 pF Input Generator Input Generator VO (VOH + VOL)/2 VOH VOL Data Out at XB1 or XB 2 (VOH + VOL)/2 3.5 V 1.5 V Data In at Ax or A y 2.5 V tPLHx tPHLx tsk(o) tsk(o) tPLHy tPHLy tsk(o) = tPLHy - t PLHx or tPHLy - t PHLx VOH VOL VOLTAGE WAVEFORMS PULSE SKEW [t sk(p)] Output (VOH + VOL)/2 Input 2.5 V tPLH tPHL tsk(p) = tPHL - t PLH 3.5 V 1.5 V VO VI VO TS2DDR2811 www.ti.com SCDS294 – DECEMBER 2009 PARAMETER MEASUREMENT INFORMATION (Skew) A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 6. Test Circuit and Voltage Waveforms Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TS2DDR2811 |
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