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ADS8861IDGS bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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ADS8861IDGS bảng dữ liệu(HTML) 4 Page - Texas Instruments |
4 / 49 page ADS8861 SBAS557A – MAY 2013 – REVISED DECEMBER 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) All minimum and maximum specifications are at TA = –40°C to +85°C, AVDD = 3 V, DVDD = 3 V, VREF = 5 V, VCM = VREF / 2 V, and fSAMPLE = 1 MSPS, unless otherwise noted. Typical specifications are at TA = +25°C, AVDD = 3 V, and DVDD = 3 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS At 1 kHz, VREF = 5 V 95 96.4 dB SINAD Signal-to-noise + distortion(6) At 10 kHz, VREF = 5 V 95.4 dB At 100 kHz, VREF = 5 V 91.6 dB At 1 kHz, VREF = 5 V 95.1 96.5 dB SNR Signal-to-noise ratio(6) At 10 kHz, VREF = 5 V 95.5 dB At 100 kHz, VREF = 5 V 92 dB At 1 kHz, VREF = 5 V –112 dB THD Total harmonic distortion(6)(7) At 10 kHz, VREF = 5 V –112 dB At , VREF = 5 V -102 dB At 1 kHz, VREF = 5 V 112 dB SFDR Spurious-free dynamic range(6) At 10 kHz, VREF = 5 V 112 dB At 100 kHz, VREF = 5 V 102 dB BW–3dB –3-dB small-signal bandwidth 30 MHz EXTERNAL REFERENCE INPUT VREF Input range 2.5 5 V Reference input current During conversion, 1-MHz sample rate, mid-code 300 μA Reference leakage current 250 nA Decoupling capacitor at the REF CREF 10 22 µF input POWER-SUPPLY REQUIREMENTS AVDD Analog supply 2.7 3 3.6 V Power-supply Digital supply range for SCLK > 40 MHz 2.7 3 3.6 V voltage DVDD Digital supply range for SCLK < 40 MHz 1.65 1.8 3.6 V Supply current AVDD 1-MHz sample rate, AVDD = 3 V 1.8 2.4 mA 1-MHz sample rate, AVDD = 3 V 5.5 7.2 mW PVA Power dissipation 100-kHz sample rate, AVDD = 3 V 0.55 mW 10-kHz sample rate, AVDD = 3 V 55 μW IAPD Device power-down current(8) 50 nA DIGITAL INPUTS: LOGIC FAMILY (CMOS) 1.65 V < DVDD < 2.3 V 0.8 × DVDD DVDD + 0.3 V VIH High-level input voltage 2.3 V < DVDD < 3.6 V 0.7 × DVDD DVDD + 0.3 V 1.65 V < DVDD < 2.3 V –0.3 0.2 × DVDD V VIL Low-level input voltage 2.3 V < DVDD < 3.6 V –0.3 0.3 × DVDD V ILK Digital input leakage current ±10 ±100 nA DIGITAL OUTPUTS: LOGIC FAMILY (CMOS) VOH High-level output voltage IO = 500-μA source, CLOAD = 20 pF 0.8 × DVDD DVDD V VOL Low-level output voltage IO = 500-μA sink, CLOAD = 20 pF 0 0.2 × DVDD V TEMPERATURE RANGE TA Operating free-air temperature –40 +85 °C (6) All specifications expressed in decibels (dB) refer to the full-scale input (FSR) and are tested with an input signal 0.5 dB below full-scale, unless otherwise specified. (7) Calculated on the first nine harmonics of the input frequency. (8) The device automatically enters a power-down state at the end of every conversion, and remains in power-down during the acquisition phase. 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: ADS8861 |
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