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LM21305 bảng dữ liệu(PDF) 10 Page - Texas Instruments

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tên linh kiện LM21305
Giải thích chi tiết về linh kiện  5A Adjustable Frequency Synchronous Buck Regulator
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LM21305
FREQ
RFRQ
External
Clock
CFRQ
LM21305
FREQ
RFRQ
CFRQ
LM21305
SNVS639F – DECEMBER 2009 – REVISED MARCH 2013
www.ti.com
PEAK CURRENT-MODE CONTROL
In most applications, the peak current-mode control architecture used in the LM21305 only requires two external
components to achieve a stable design. External compensation allows the user to set the crossover frequency
and phase margin, thus optimizing the transient performance of the device. For duty cycles above 50%, all peak
current-mode control buck converters require the addition of an artificial ramp to avoid sub-harmonic oscillation.
This linear ramp is commonly referred to as slope compensation. The amount of slope compensation in the
LM21305 will automatically change depending on the switching frequency: the higher the switching frequency,
the larger the slope compensation. This allows smaller inductors to be used with high switching frequency to
increase the power density.
SWITCHING FREQUENCY SETTING AND SYNCHRONIZATION
The LM21305 switching regulator can operate at a frequency ranging from 300 kHz to 1.5 MHz. The switching
frequency can be set / controlled in two ways. One is by selecting the external resistor attached to the FREQ pin
to set the internal oscillator frequency which controls the switching frequency. An external 100 pF capacitor,
CFRQ, should also be connected from the FREQ pin to analog ground as a noise filter, as shown in Figure 20.
Figure 20. Switching Frequency set by External Resistor
The other way is to synchronize the switching frequency to an external clock in the range of 300 kHz to 1.5 MHz.
The external clock should be applied through a 100 pF coupling capacitor, CFRQ, as shown in Figure 21.
Figure 21. Switching Frequency Synchronized to External Clock
The recommendations for the external clock include peak-to-peak voltage above 1.5V, duty cycle between 20%
and 80%, and the edge rate faster than 100 ns. Circuits that use an external clock should still have a resistor
connected from the FREQ pin to analog ground. The external clock frequency should be within -10% to +50% of
the frequency set by RFRQ. This allows the regulator to continue operating at approximately the same switching
frequency if the external clock fails and the coupling capacitor on the clock side is grounded or pulled to logic
high.
If the external clock fails low, timeout circuits will prevent the high-side FET from staying off for longer than 1.5
times the switching period (switching period Ts = 1/fs). At the end of this timeout period, the regulator will begin to
switch at the frequency set by RFRQ.
If the external clock fails high, timeout circuits will again prevent the high-side FET from staying off longer than
1.5 times the switching period. After this timeout period, the internal oscillator takes over and switches at a fixed
1 MHz until the voltage on the FREQ pin has decayed to approximately 0.6V. This decay follows the time
constant of CFRQ and RFRQ, and once it is complete the regulator will switch at the frequency set by RFRQ.
LIGHT-LOAD OPERATION
The LM21305 offers increased efficiency at light loads by allowing Discontinuous Conduction Mode (DCM).
When the load current is less than half of the inductor ripple current, the device will enter DCM thus preventing
negative inductor current. The current at which this occurs is the critical conduction boundary and can be
calculated according to the following equation:
10
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