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LM96530 bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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LM96530 bảng dữ liệu(HTML) 10 Page - Texas Instruments |
10 / 18 page OUTn VLL BG HVGND VSS VDD AGND High-voltage pulser VPP VNN INn SDI SDO RREF VSUB RREF VOUT Pin Nin SCSI Pn RT SCSO SCLKO . SW_OFF SPI_EN SCLKI P7 P6 P5 P4 P3 P2 P1 P0 LM96530 SNAS499F – AUGUST 2010 – REVISED MAY 2013 www.ti.com FUNCTIONAL DESCRIPTION The LM96530 RX switch provides an 8-channel receive side interface solution for medical ultrasound applications suitable for integration into multi-channel (128 / 256 channel) systems. Its diode-bridge-based architecture allows high-speed low-distortion channel designs targeting low-power, portable systems. A complete system can be designed using Texas Instruments’ companion LM965XX chipset. Figure 11. Block Diagram of T/R Channel A functional block diagram of the IC is shown in Figure 11. Each RX switch channel on the IC has a high-voltage input that can be directly connected to a transducer driven by a high-voltage pulser, such as the LM96550. The input feeds into a diode bridge with its output being diode-clamped to ± 0.7V. The diode bridge bias current is set to 1 mA with Rref = 50K Ω. Therefore, the output can be directly connected to a low noise amplifier (LNA) stage which must be protected from the high-voltage signals on the transducer. The bias current of the bridge is determined by two equally-sized current sources with their current value ranging between 0 and 8mA depending on the external resistor Rref at the input of the bandgap reference block. While the bias current is the same value for all channels on the IC, each channel can be switched on and off individually with an 8–bit shift register that is programmed via a SPI™ compatible bus. The on-chip analog circuitry requires dual 5V supplies VDD and VSS, a single logic supply VLL, and a high voltage negative bias, VSUB. SERIAL INTERFACE OPERATION The digital interface is comprised of an 8-bit shift register and a latch. Each bit controls one T/R switch channel, where the MSB bit, i.e., the first bit written (D7) controls channel 7, and the LSB bit (D0) controls channel 0. The three input pins, SDI, SCSI and SCKl, are all Schmitt Trigger inputs with 0.5V typical hysteresis. The output pins SDO, SCSO, and SCLKO are SPI™ compatible. The serial data input SDI is synchronously read into the shift register on the rising edge of the clock SCKI. When SCSI changes from low to high, the data in the shift register is transferred to the latch circuit, and output on the parallel data signals P0 through P7 which drive the switched bias current sources for channels n=0,…, 7, respectively. When SCSI changes from high to low, the latch output Pn, and thus the biasing condition, does not change. 10 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM96530 |
Số phần tương tự - LM96530_14 |
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Mô tả tương tự - LM96530_14 |
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