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STCD2400F35F bảng dữ liệu(PDF) 11 Page - STMicroelectronics |
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STCD2400F35F bảng dữ liệu(HTML) 11 Page - STMicroelectronics |
11 / 39 page STCD22x0, STCD23x0, STCD24x0 Device overview Doc ID 15400 Rev 2 11/39 Table 4. Pin functions (STCD24x0, 4-channel) Pin number Pin name Description A1 VCC Supply voltage (decouple with a 1 µF capacitor to GND) B1 VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND) C1 MCLK Master clock input D1 OPT2 Optional pin 2. Connect to VCC or GND on PC board to field configure EN3 and EN4 active high/low. Refer to Section 3.2: Enable polarity for detailed information. A2 BYP Bypass capacitor input pin (10 nF capacitor should be connected to GND in order to improve thermal noise performance) B2 GND Supply ground C2 MCREQ Master clock request signal (open drain, active low) D2 OPT1 Optional pin 1. Connect to VCC or GND on PC board to field configure EN1 and EN2 active high/low. Refer to Section 3.2: Enable polarity for detailed information. A3 CLK1 Clock output channel - output 1 B3 EN1 Clock output channel enable-1 (active high/low OPT1 field programmable) C3 EN4 Clock output channel enable-4 (active high/low OPT2 field programmable) D3 CLK4 Clock output channel - output 4 A4 CLK2 Clock output channel - output 2 B4 EN2 Clock output channel enable-2 (active high/low OPT1 field programmable) C4 EN3 Clock output channel enable-3 (active high/low OPT2 field programmable) D4 CLK3 Clock output channel - output 3 |
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