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AD2S1210SST-EP-RL7 bảng dữ liệu(PDF) 4 Page - Analog Devices |
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AD2S1210SST-EP-RL7 bảng dữ liệu(HTML) 4 Page - Analog Devices |
4 / 16 page AD2S1210-EP Rev. 0 | Page 4 of 16 Parameter Min Typ Max Unit Conditions/Comments Settling Time 10° Step Input 10-bit 0.6 0.9 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 12-bit 2.2 3.3 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 14-bit 6.5 9.8 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 16-bit 27.5 48 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz Settling Time 179° Step Input 10-bit 1.5 2.4 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 12-bit 4.75 6.1 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 14-bit 10.5 15.2 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz 16-bit 45 68 ms To settle to within ±2 LSB, CLKIN = 8.192 MHz EXC, EXC OUTPUTS Voltage 3.2 3.6 4.0 V p-p Load ±100 µA, typical differential output (EXC to EXC) = 7.2 V p-p Center Voltage 2.40 2.47 2.53 V Frequency 2 20 kHz EXC/EXC DC Mismatch 30 mV EXC/EXC AC Mismatch 132 mV THD −58 dB First five harmonics VOLTAGE REFERENCE REFOUT 2.40 2.47 2.53 V ±IOUT = 100 µA Drift 100 ppm/°C PSRR −60 dB CLKIN, XTALOUT6 VIL Voltage Input Low 0.8 V VIH Voltage Input High 2.0 V LOGIC INPUTS VIL Voltage Input Low 0.8 V VDRIVE = 2.7 V to 5.25 V 0.7 V VDRIVE = 2.3 V to 2.7 V VIH Voltage Input High 2.0 V VDRIVE = 2.7 V to 5.25 V 1.7 V VDRIVE = 2.3 V to 2.7 V IIL Low Level Input Current (Non- Pull-Up) 10 µA IIL Low Level Input Current (Pull-Up) 80 µA RES0, RES1, RD, WR/FSYNC, A0, A1, and RESET pins IIH High Level Input Current −10 µA LOGIC OUTPUTS VOL Voltage Output Low 0.4 V VDRIVE = 2.3 V to 5.25 V VOH Voltage Output High 2.4 V VDRIVE = 2.7 V to 5.25 V 2.0 V VDRIVE = 2.3 V to 2.7 V IOZH High Level Three-State Leakage −10 µA IOZL Low Level Three-State Leakage 10 µA POWER REQUIREMENTS AVDD 4.75 5.25 V DVDD 4.75 5.25 V VDRIVE 2.3 5.25 V POWER SUPPLY IAVDD 12 mA IDVDD 35 mA IOVDD 2 mA 1 Temperature range is as follows: –55°C to +125°C. 2 The voltages SIN, SINLO, COS, and COSLO, relative to AGND, must always be between 0.15 V and AV DD − 0.2 V. 3 All specifications within the angular accuracy parameter are tested at constant velocity, that is, zero acceleration. 4 The velocity accuracy specification includes velocity offset and dynamic ripple. 5 For example, when RES0 = 0 and RES1 = 1, the position output has a resolution of 12 bits. The velocity output has a resolution of 11 bits with the MSB indicating the direction of rotation. In this example, with a CLKIN frequency of 8.192 MHz, the velocity LSB is 0.488 rps, that is, 1000 rps/(211). 6 The clock frequency of the AD2S1210-EP can be supplied with a crystal, an oscillator, or directly from a DSP/microprocessor digital output. When using a single-ended clock signal directly from the DSP/microprocessor, the XTALOUT pin should remain open circuit and the logic levels outlined under the logic inputs parameter in Table 1 apply. |
Số phần tương tự - AD2S1210SST-EP-RL7 |
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Mô tả tương tự - AD2S1210SST-EP-RL7 |
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