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FJV3102R bảng dữ liệu(PDF) 4 Page - Fairchild Semiconductor |
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FJV3102R bảng dữ liệu(HTML) 4 Page - Fairchild Semiconductor |
4 / 5 page © 2002 Fairchild Semiconductor Corporation www.fairchildsemi.com FJV3102R Rev. 1.1.2 4 Physical Dimensions Figure 5. 3-LEAD, SOT-23, JEDEC TO-236, LOW PROFILE (ACTIVE) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/MA/MA03D.pdf. For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area: http://www.fairchildsemi.com/packing_dwg/PKG-MA03D_BK.pdf. LAND PATTERN RECOMMENDATION NOTES: UNLESS OTHERWISE SPECIFIED A) REFERENCE JEDEC REGISTRATION TO-236, VARIATION AB, ISSUE H. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE INCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M - 1994. E) DRAWING FILE NAME: MA03DREV10 3 12 SEE DETAIL A SEATING PLANE SCALE: 2X GAGE PLANE (0.55) (0.93) 1.20 MAX C 0.10 0.00 0.10 C 2.40±0.30 2.92±0.20 1.30 +0.20 -0.15 0.60 0.37 0.20 A B 1.90 0.95 (0.29) 0.95 1.40 2.20 1.00 1.90 0.25 0.23 0.08 0.20 MIN SOT-23 |
Số phần tương tự - FJV3102R |
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Mô tả tương tự - FJV3102R |
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