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LMV982MMXNOPB bảng dữ liệu(PDF) 6 Page - National Semiconductor (TI)

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LMV981-N, LMV982-N
SNOS976L – NOVEMBER 2001 – REVISED MARCH 2013
www.ti.com
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C. V
+ = 2.7V, V = 0V, V
CM = 1.0V, VO = 1.35V, RL > 1 MΩ and
SHDN tied to V
+. Boldface limits apply at the temperature extremes. See (1).
Parameter
Test Conditions
Min (2)
Typ (3)
Max (2)
Units
SR
Slew Rate
(4)
0.4
V/µs
GBW
Gain-Bandwidth Product
1.4
MHz
Φm
Phase Margin
70
deg
Gm
Gain Margin
7.5
dB
en
Input-Referred Voltage Noise
f = 10 kHz, VCM = 0.5V
57
nV/
√Hz
in
Input-Referred Current Noise
f = 10 kHz
0.08
pA/
√Hz
THD
Total Harmonic Distortion
f = 1kHz, AV = +1
0.022
%
RL = 600Ω, VIN = 1VPP
Amp-to-Amp Isolation
(5)
123
dB
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self heating where TJ > TA. See Application Note section for information on temperature derating of
this device. Absolute Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded,
either mechanically or electrically.
(2)
All limits are specified by testing or statistical analysis.
(3)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4)
Connected as voltage follower with input step from Vto V+. Number specified is the slower of the positive and negative slew rates.
(5)
Input referred, RL = 100kΩ connected to V
+/2. Each amp excited in turn with 1kHz to produce V
O = 3VPP. (For Supply Voltages <3V, VO
= V+).
5V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C. V
+ = 5V, V = 0V, V
CM = V
+/2, V
O = V
+/2, R
L > 1 MΩ and SHDN
tied to V
+. Boldface limits apply at the temperature extremes. See (1).
Parameter
Test Conditions
Min (2)
Typ (3)
Max (2)
Units
VOS
Input Offset Voltage
LMV981-N (Single)
1
4
6
mV
LMV982 (Dual)
1
5.5
7.5
TCVOS
Input Offset Voltage Average Drift
5.5
μV/°C
IB
Input Bias Current
14
35
nA
50
IOS
Input Offset Current
9
25
nA
40
IS
Supply Current (per Channel)
116
210
μA
230
In Shutdown
LMV981-N (Single)
0.201
1
2
μA
LMV982 (Dual)
0.302
3.5
5
CMRR
Common Mode Rejection Ratio
0
≤ VCM ≤ 3.8V
60
86
4.6V
≤ VCM ≤ 5.0V
(4)
55
dB
−0.2V ≤ VCM ≤ 0V
50
78
5.0V
≤ VCM ≤ 5.2V
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical
tables under conditions of internal self heating where TJ > TA. See Application Note section for information on temperature derating of
this device. Absolute Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded,
either mechanically or electrically.
(2)
All limits are specified by testing or statistical analysis.
(3)
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(4)
For ensured temperature ranges, see Input Common-Mode Voltage Range specifications.
6
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Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LMV981-N LMV982-N


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