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ADS7820UB bảng dữ liệu(PDF) 4 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
tên linh kiện ADS7820UB
Giải thích chi tiết về linh kiện  12-Bit 10ms Sampling CMOS ANALOG-to-DIGITAL CONVERTER
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nhà sản xuất  BURR-BROWN [Burr-Brown (TI)]
Trang chủ  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

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4
®
ADS7820
1VIN
Analog Input. Full-scale input range is 0 to +5V.
2
AGND1
Analog Ground. Used internally as ground reference point.
3
REF
Reference Input/Output. Outputs internal reference of +2.5V nominal. Can also be driven by external system reference. In both
cases, connect to ground with a 2.2
µF Tantalum capacitor.
4
CAP
Reference Buffer Capacitor. 2.2
µF Tantalum to ground.
5
AGND2
Analog Ground.
6
D11 (MSB)
Data Bit 11. Most Significant Bit (MSB) of conversion results. Hi-Z state when CS is HIGH, or when R/C is LOW.
7
D10
Data Bit 10. Hi-Z state when CS is HIGH, or when R/C is LOW.
8
D9
Data Bit 9. Hi-Z state when CS is HIGH, or when R/C is LOW.
9
D8
Data Bit 8. Hi-Z state when CS is HIGH, or when R/C is LOW.
10
D7
Data Bit 7. Hi-Z state when CS is HIGH, or when R/C is LOW.
11
D6
Data Bit 6. Hi-Z state when CS is HIGH, or when R/C is LOW.
12
D5
Data Bit 5. Hi-Z state when CS is HIGH, or when R/C is LOW.
13
D4
Data Bit 4. Hi-Z state when CS is HIGH, or when R/C is LOW.
14
DGND
Digital Ground.
15
D3
Data Bit 3. Hi-Z state when CS is HIGH, or when R/C is LOW.
16
D2
Data Bit 2. Hi-Z state when CS is HIGH, or when R/C is LOW.
17
D1
Data Bit 1. Hi-Z state when CS is HIGH, or when R/C is LOW.
18
D0 (LSB)
Data Bit 0. Lease Significant Bit (LSB) of conversion results. Hi-Z state when CS is HIGH, or when R/C is LOW.
19
DZ
Data Zero. LOW when CS LOW and R/C HIGH. Hi-Z state when CS is HIGH, or when R/C is LOW.
20
DZ
Data Zero. LOW when CS LOW and R/C HIGH. Hi-Z state when CS is HIGH, or when R/C is LOW.
21
DZ
Data Zero. LOW when CS LOW and R/C HIGH. Hi-Z state when CS is HIGH, or when R/C is LOW.
22
DZ
Data Zero. LOW when CS LOW and R/C HIGH. Hi-Z state when CS is HIGH, or when R/C is LOW.
23
BYTE
Byte Select. With BYTE LOW, data will be output as indicated above, causing pin 6 (D11) to output the MSB, and pin 18 (D0) to
output the LSB. Pins 19 to 22 will output LOWs. With BYTE HIGH, the top and bottom 8 bits of data will be switched, so that pin 6
outputs data bit 3, pin 9 outputs data bit 0 (LSB), pin 10 to 13 output LOWs, pin 15 outputs data bit 11 (MSB) and pin 22 outputs
data bit 4.
24
R/C
Read/Convert input. With CS LOW, a falling edge on R/C puts the internal sample/hold into the hold state and starts a conversion.
With CS LOW, a rising edge on R/C enables the output data bits.
25
CS
Chip Select. Internally OR’d with R/C. With R/C LOW, a falling edge on CS will initiate a conversion. With R/C HIGH, a falling edge
on CS will enable the output data bits.
26
BUSY
Busy Output. Falls when a conversion is started, and remains LOW until the conversion is completed and the data is latched into the
output register. With CS LOW and R/C HIGH, output data will be valid when BUSY rises, so that the rising edge can be used to
latch the data. CS or R/C must be high when BUSY rises, or another conversion will start, without time for signal acquisition.
27
VANA
Analog Supply Input. Nominally +5V. Connect directly to pin 28. Decouple to ground with 0.1
µF ceramic and 10µF Tantalum
capacitors.
28
VDIG
Digital Supply Input. Nominally +5V. Connect directly to pin 27. Must be
≤ V
ANA.
PIN CONFIGURATION
V
DIG
V
ANA
BUSY
CS
R/C
BYTE
DZ
DZ
DZ
DZ
D0 (LSB)
D1
D2
D3
V
IN
AGND1
REF
CAP
AGND2
D11 (MSB)
D10
D9
D8
D7
D6
D5
D4
DGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS7820
PIN #
NAME
DESCRIPTION
PIN ASSIGNMENTS


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