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54LS138 bảng dữ liệu(PDF) 1 Page - Motorola, Inc |
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54LS138 bảng dữ liệu(HTML) 1 Page - Motorola, Inc |
1 / 5 page 5-230 FAST AND LS TTL DATA 1-OF-8 DECODER/ DEMULTIPLEXER The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel ex- pansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32 decoder using four LS138s and one inverter. The LS138 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. • Demultiplexing Capability • Multiple Input Enable for Easy Expansion • Typical Power Dissipation of 32 mW • Active Low Mutually Exclusive Outputs • Input Clamp Diodes Limit High Speed Termination Effects 14 13 12 11 10 9 1 2 3 4 5 6 7 16 15 8 VCC A0 O0 O1 O2 O3 O5 O4 O6 A1 A2 E1 E2 E3 O7 GND CONNECTION DIAGRAM DIP (TOP VIEW) NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. PIN NAMES LOADING (Note a) HIGH LOW A0 – A2 E1, E2 E3 O0 – O7 Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b) 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. SN54/74LS138 1-OF-8 DECODER/ DEMULTIPLEXER LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 620-09 N SUFFIX PLASTIC CASE 648-08 16 1 16 1 ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXD SOIC 16 1 D SUFFIX SOIC CASE 751B-03 LOGIC SYMBOL VCC = PIN 16 GND = PIN 8 15 14 13 12 11 10 9 1 2 3 4 5 6 1 2 3 A0 A1 A2 E O0 O1 O2 O3 O4 O5 O6 O7 7 LOGIC DIAGRAM A2 A1 A0 E1 E2 E3 O7 O6 O5 O4 O3 O2 O1 O0 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 3 2 1 4 5 6 7 9 15 14 13 12 11 10 |
Số phần tương tự - 54LS138 |
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Mô tả tương tự - 54LS138 |
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