10

®

ADS7820

LAYOUT

POWER

For optimum performance, tie the analog and digital power

pins to the same +5V power supply and tie the analog and

digital grounds together. As noted in the electrical specifica-

tions, the ADS7820 uses 90% of its power for the analog

circuitry. The ADS7820 should be considered as an analog

component.

The +5V power for the A/D should be separate from the +5V

directly to a digital supply can reduce converter performance

due to switching noise from the digital logic. For best

performance, the +5V supply can be produced from what-

ever analog supply is used for the rest of the analog signal

conditioning. If +12V or +15V supplies are present, a simple

+5V regulator can be used. Although it is not suggested, if

the digital supply must be used to power the converter, be

sure to properly filter the supply. Either using a filtered

GROUNDING

Three ground pins are present on the ADS7820. DGND is

the digital supply ground. AGND2 is the analog supply

ground. AGND1 is the ground which all analog signals

internal to the A/D are referenced. AGND1 is more suscep-

tible to current induced voltage drops and must have the path

of least resistance back to the power supply.

All the ground pins of the A/D should be tied to the analog

ground plane, separated from the system’s digital logic

ground, to achieve optimum performance. Both analog and

digital ground planes should be tied to the “system” ground

as near to the power supplies as possible. This helps to

prevent dynamic digital ground currents from modulating

the analog ground through a common impedance to power

ground.

SIGNAL CONDITIONING

The FET switches used for the sample hold on many CMOS

A/D converters release a significant amount of charge injec-

tion which can cause the driving op amp to oscillate. The

FET switch on the ADS7820, compared to the FET switches

on other CMOS A/D converters, releases 5%-10% of the

charge. There is also a resistive front end which attenuates

any charge which is released. The end result is a minimal

requirement for the anti-alias filter on the front end. Any op

amp sufficient for the signal in an application will be

sufficient to drive the ADS7820.

INTERMEDIATE LATCHES

The ADS7820 does have tri-state outputs for the parallel

port, but intermediate latches should be used if the bus will

be active during conversions. If the bus is not active during

conversion, the tri-state outputs can be used to isolate the

A/D from other peripherals on the same bus. Tri-state

outputs can also be used when the A/D is the only peripheral

on the data bus.

Intermediate latches are beneficial on any monolithic A/D

converter. The ADS7820 has an internal LSB size of 610

µV.

Transients from fast switching signals on the parallel port,

even when the A/D is tri-stated, can be coupled through the

substrate to the analog circuitry causing degradation of

converter performance. The effects of this phenomenon will

be more obvious when using the pin-compatible ADS7821

or any of the other 16-bit converters in the ADS Family. This

is due to the smaller internal LSB size of 38

µV.