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MCF5274VM166 bảng dữ liệu(PDF) 4 Page - Freescale Semiconductor, Inc |
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MCF5274VM166 bảng dữ liệu(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 44 page MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4 Signal Descriptions Freescale Semiconductor 4 4 Signal Descriptions This section describes signals that connect off chip, including a table of signal properties. For a more detailed discussion of the MCF5275 signals, consult the MCF5275 Reference Manual (MCF5275RM). Table 2 lists the signals for the MCF5275 in functional group order. The “Dir” column is the direction for the primary function of the pin. Refer to Section 6, “Mechanicals/Pinouts,” for package diagrams. NOTE In this table and throughout this document a single signal within a group is designated without square brackets (i.e., A24), while designations for multiple signals within a group use brackets (i.e., A[23:21]) and is meant to include all signals within the two bracketed numbers when these numbers are separated by a colon. NOTE The primary functionality of a pin is not necessarily its default functionality. Pins that are muxed with GPIO will default to their GPIO functionality. Table 2. MCF5274 and MCF5275 Signal Information and Muxing Signal Name GPIO Alternate1 Alternate2 Dir.1 MCF5274 MCF5275 256 MAPBGA MCF5274L MCF5275L 196 MAPBGA Reset RESET — —— IN15 K12 RSTOUT — —— ON14 L12 Clock EXTAL — —— I L16 M14 XTAL — —— OM16 N14 CLKOUT — —— OT12 P9 Mode Selection CLKMOD[1:0] — —— I N13, P13 M11, N11 RCON — —— IP8 M6 External Memory Interface and Ports A[23:21] PADDR[7:5] CS[6:4] — O A11, B11, C11 A8, B8, C8 A[20:0] — — — O A12, B12, C12, A13, B13, C13, A14, B14, C14, B15, C15, B16, C16, D14, D15, E14:16, F14:16 B9, D9, C9, C10, B10, A11, C11, B11, A12, D11, C12, B13, C13, D12, E11, D13, E12, F11, D14, E13, F13 |
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