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74HC125D bảng dữ liệu(PDF) 7 Page - NXP Semiconductors

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74HC_HCT125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 10 January 2013
7 of 17
NXP Semiconductors
74HC125; 74HCT125
Quad buffer/line driver; 3-state
[1]
tpd is the same as tPLH and tPHL.
[2]
ten is the same as tPZH and tPZL.
[3]
tdis is the same as tPLZ and tPHZ.
[4]
tt is the same as tTHL and tTLH.
[5]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L  VCC
2
 f
o) = sum of outputs.
11. Waveforms
For type 74HCT125
tpd
propagation
delay
nA to nY; see Figure 5
[1]
VCC = 4.5 V
-
15
25
-
31
-
38
ns
VCC =5V; CL =15pF
-
12
-
-
-
-
-
ns
ten
enable time
nOE to nY; see Figure 6
[2]
VCC = 4.5 V
-
15
28
-
35
-
42
ns
tdis
disable time
nOE to nY; see Figure 6
[3]
VCC = 4.5 V
-
15
25
-
31
-
38
ns
tt
transition
time
nY; see Figure 5
[4]
-
5
12
-
15
-
18
ns
CPD
power
dissipation
capacitance
CL =50pF;f= 1 MHz;
VI =GND to VCC
[5]
-24
-
-
-
-
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 7.
Symbol Parameter
Conditions
25
C
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Propagation delay input (nA) to output (nY)
90 %
10 %
nA input
nY output
VI
VM
VM
VM
VM
GND
VOH
VOL
tTHL
tTLH
tPHL
tPLH
aaa-003130


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