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4 / 113 page List of tables Table 1. STM8S103xx access line features .............................................................................................9 Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers ..................................14 Table 3. TIM timer features ....................................................................................................................16 Table 4. Legend/abbreviations for pinout tables ...................................................................................19 Table 5. UFQFPN32/LQFP32 pin description ........................................................................................20 Table 6. STM8S103Fx pin description ...................................................................................................24 Table 7. I/O port hardware register map ................................................................................................27 Table 8. General hardware register map ...............................................................................................28 Table 9. CPU/SWIM/debug module/interrupt controller registers .........................................................38 Table 10. Interrupt mapping ...................................................................................................................40 Table 11. Option bytes .........................................................................................................................110 Table 12. Option byte description ...........................................................................................................42 Table 13. STM8S103K alternate function remapping bits for 32-pin devices ........................................44 Table 14. STM8S103F alternate function remapping bits for 20-pin devices ........................................45 Table 15. Unique ID registers (96 bits) .................................................................................................110 Table 16. Voltage characteristics ...........................................................................................................49 Table 17. Current characteristics ...........................................................................................................50 Table 18. Thermal characteristics ..........................................................................................................50 Table 19. General operating conditions .................................................................................................51 Table 20. Operating conditions at power-up/power-down ......................................................................52 Table 21. Total current consumption with code execution in run mode at VDD = 5 V .............................53 Table 22. Total current consumption with code execution in run mode at VDD = 3.3 V ..........................54 Table 23. Total current consumption in wait mode at VDD = 5 V ............................................................55 Table 24. Total current consumption in wait mode at VDD = 3.3 V .........................................................55 Table 25. Total current consumption in active halt mode at VDD = 5 V ..................................................56 Table 26. Total current consumption in active halt mode at VDD = 3.3 V ...............................................57 Table 27. Total current consumption in halt mode at VDD = 5 V .............................................................58 Table 28. Total current consumption in halt mode at VDD = 3.3 V ..........................................................58 Table 29. Wakeup times .........................................................................................................................58 Table 30. Total current consumption and timing in forced reset state ....................................................59 Table 31. Peripheral current consumption .............................................................................................60 Table 32. HSE user external clock characteristics .................................................................................63 Table 33. HSE oscillator characteristics .................................................................................................64 Table 34. HSI oscillator characteristics ..................................................................................................65 Table 35. LSI oscillator characteristics ...................................................................................................67 Table 36. RAM and hardware registers ..................................................................................................68 Table 37. Flash program memory/data EEPROM memory ....................................................................68 Table 38. I/O static characteristics .........................................................................................................69 Table 39. Output driving current (standard ports) ..................................................................................71 Table 40. Output driving current (true open drain ports) ........................................................................71 Table 41. Output driving current (high sink ports) ..................................................................................72 Table 42. NRST pin characteristics ........................................................................................................77 Table 43. SPI characteristics ..................................................................................................................80 Table 44. I 2C characteristics ..................................................................................................................82 Table 45. ADC characteristics ................................................................................................................84 Table 46. ADC accuracy with RAIN < 10 kΩ , VDD= 5 V .........................................................................84 Table 47. ADC accuracy with RAIN < 10 kΩ RAIN, VDD = 3.3 V ..............................................................85 DocID15441 Rev 6 4/113 STM8S103K3 STM8S103F3 STM8S103F2 List of tables |
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