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AM27C128-55JI bảng dữ liệu(PDF) 1 Page - Advanced Micro Devices |
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AM27C128-55JI bảng dữ liệu(HTML) 1 Page - Advanced Micro Devices |
1 / 12 page FINAL Publication# 11420 Rev: E Amendment/0 Issue Date: May 1998 Am27C128 128 Kilobit (16 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS s Fast access time — Speed options as fast as 45 ns s Low power consumption — 20 µA typical CMOS standby current s JEDEC-approved pinout s Single +5 V power supply s ±10% power supply tolerance standard s 100% Flashrite™ programming — Typical programming time of 2 seconds s Latch-up protected to 100 mA from –1 V to VCC + 1 V s High noise immunity s Versatile features for simple interfacing — Both CMOS and TTL input/output compatibility — Two line control functions s Standard 28-pin DIP, PDIP, and 32-pin PLCC packages GENERAL DESCRIPTION The Am27C128 is a 128-Kbit, ultraviolet erasable pro- grammable read-only memory. It is organized as 16 Kwords by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages, as well as plastic one time programmable (OTP) PDIP and PLCC packages. Data can be typically accessed in less than 45 ns, al- lowing high-performance microprocessors to operate without any WAIT states. The device offers separate Output Enable (OE#) and Chip Enable (CE#) controls, thus eliminating bus contention in a multiple bus micro- processor system. AMD’s CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 80 mW in active mode, and 100 µW in standby mode. All signals are TTL levels, including programming sig- nals. Bit locations may be programmed singly, in blocks, or at random. The device supports AMD’s Flashrite programming algorithm (100 µs pulses), re- sulting in a typical programming time of 2 seconds. BLOCK DIAGRAM 11420E-1 A0–A13 Address Inputs PGM# CE# OE# VCC VSS VPP Data Outputs DQ0–DQ7 Output Buffers Y Gating 131,072 Bit Cell Matrix X Decoder Y Decoder Output Enable Chip Enable and Prog Logic |
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