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AM27C4096-105JC bảng dữ liệu(PDF) 10 Page - Advanced Micro Devices

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Am27C4096
AC CHARACTERISTICS
Caution: Do not remove the device from (or insert it into) a socket or board that has VPP or VCC applied.
Notes:
1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. This parameter is sampled and not 100% tested.
3. Switching characteristics are over operating range, unless otherwise specified.
4. See Figure 3 and Table 1 for test specifications.
SWITCHING WAVEFORMS
Notes:
1. OE# may be delayed up to tACC – tOE after the falling edge of the addresses without impact on tACC.
2. tDF is specified from OE# or CE#, whichever occurs first.
PACKAGE CAPACITANCE
Notes:
1. This parameter is only sampled and not 100% tested.
2. TA = +25°C, f = 1 MHz.
Parameter Symbols
Description
Test Setup
Am27C4096
Unit
JEDEC
Standard
-95
-105
-120
-150
-200
-255
tAVQV
tACC
Address to Output Delay
CE#,
OE# = VIL
Max
90
100
120
150
200
250
ns
tELQV
tCE
Chip Enable to Output Delay
OE# = VIL Max
90
100
120
150
200
250
ns
tGLQV
tOE
Output Enable to Output Delay
CE# = VIL Max
5050
50
657575
ns
tEHQZ
tGHQZ
tDF
(Note 2)
Chip Enable High or Output Enable
High to Output High Z, Whichever
Occurs First
Max
3030
40
404060
ns
tAXQX
tOH
Output Hold Time from Addresses,
CE# or OE#, Whichever Occurs
First
Min
00
0000
ns
Addresses
CE#/PGM#
OE#
Output
11408F-9
Addresses Valid
High Z
High Z
tCE
Valid Output
2.4
0.45
2.0
0.8
2.0
0.8
tACC
(Note 1)
tOE
tDF (Note 2)
tOH
Parameter
Symbol
Parameter
Description
Test Conditions
CDV040
PD 040
PL 044
Unit
Typ
Max
Typ
Max
Typ
Max
CIN
Input Capacitance
VIN = 0
10
13
6
8
10
13
pF
COUT
Output Capacitance
VOUT = 0
10
13
8
10
12
14
pF


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