ADM696/ADM697

REV. 0

–5–

Low Line RESET OUTPUT

RESET

is an active low output which provides a RESET signal

power supply voltage. An internal timer holds RESET low for

tended as a power-on RESET signal for the processor. It allows

time for the power supply and microprocessor to stabilize. On

as 1 V. This ensures that the microprocessor is held in a stable

shutdown condition.

for enhanced noise immunity.

In addition to RESET, an active high RESET output is also

available. This is the complement of RESET and is useful for

processors requiring an active high RESET.

t

1

t

1

= RESET TIME

V1 = RESET VOLTAGE THRESHOLD LOW

V2 = RESET VOLTAGE THRESHOLD HIGH

HYSTERESIS = V2–V1

V2

V2

V1

V1

t

1

LL

IN

LOW LINE

RESET

Figure 2. Power-Fail Reset Timing

Watchdog Timer RESET

The watchdog timer circuit monitors the activity of the micro-

processor in order to check that it is not stalled in an indefinite

loop. An output line on the processor is used to toggle the

Watchdog Input (WDI) line. If this line is not toggled within

the selected timeout period, a RESET pulse is generated. The

ADM696/ADM697 may be configured for either a fixed

“short” 100 ms or a “long” 1.6 second timeout period or for an

adjustable timeout period. If the “short” period is selected some

systems may be unable to service the watchdog timer immedi-

ately after a reset, so a “long” timeout is automatically initiated

directly after a reset is issued. The watchdog timer is restarted

at the end of Reset, whether the Reset was caused by lack of ac-

The normal (short) timeout period becomes effective following

the first transition of WDI after RESET has gone inactive. The

watchdog timeout period restarts with each transition on the

WDI pin. To ensure that the watchdog timer does not time out,

either a high-to-low or low-to high transition on the WDI pin

must occur at or less than the minimum timeout period. If WDI

remains permanently either high or low, reset pulses will be is-

sued after each timeout period (1.6 s). The watchdog monitor

can be deactivated by floating the Watchdog Input (WDI) or by

connecting it to midsupply.

CIRCUIT INFORMATION

Battery-Switchover Section (ADM696)

falls very slowly or remains nearly equal to the battery voltage.

switch. This switch has a typical on resistance of 1.5

Ω and can

used to drive a RAM memory bank which may require instanta-

neous currents of greater than 100 mA. If this is the case, then

will provide the peak current transients to the RAM. A capaci-

tance value of 0.1

µF or greater may be used.

an external PNP pass transistor may be connected in parallel

with the internal transistor. The BATT ON output can directly

drive the base of the external transistor.

A 20

Ω MOSFET switch connects the V

during battery backup. This MOSFET has very low input-to-

output differential (dropout voltage) at the low current levels

required for battery backup of CMOS RAM or other low power

CMOS circuitry. The supply current in battery backup is typi-

cally 0.6

µA.

–0.3 V). High value capacitors, either standard electrolytic or

the farad-size double layer capacitors, can also be used for short-

term memory backup. A small charging current of typically

10 nA (0.1

µA max) flows out of the V

rent is useful for maintaining rechargeable batteries in a fully

charged condition. This extends the life of the backup battery

by compensating for its self discharge current. Also note that

this current poses no problem when lithium batteries are used

for backup since the maximum charging current (0.1

µA) is safe

for even the smallest lithium cells.

BATT ON

(ADM691, ADM693,

ADM695, ADM696)

700

mV

GATE DRIVE

100

mV

INTERNAL

SHUT DOWN SIGNAL

WHEN

Figure 1. Battery Switchover Schematic