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ADS8320EB250G4 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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ADS8320EB250G4 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
3 / 21 page ADS8320 3 SBAS108D www.ti.com SPECIFICATIONS: +VCC = +2.7V At –40 °C to +85°C, V REF = 2.5V, –IN = GND, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified. ADS8320E ADS8320EB PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS RESOLUTION 16 ✻ Bits ANALOG INPUT Full-Scale Input Span +In – (–In) 0 VREF ✻✻ V Absolute Input Range +In –0.1 VCC + 0.1 ✻✻ V –In –0.1 +0.5 ✻✻ V Capacitance 45 ✻ pF Leakage Current 1 ✻ nA SYSTEM PERFORMANCE No Missing Codes 14 15 Bits Integral Linearity Error ±0.008 ±0.018 ±0.006 ±0.012 % of FSR Offset Error ±1 ±2 ±0.5 ±1mV Offset Temperature Drift ±3 ✻ µV/°C Gain Error ±0.05 ±0.024 % of FSR Gain Temperature Drift ±0.3 ✻ ppm/ °C Noise 20 ✻ µVrms Power-Supply Rejection Ratio +2.7V < VCC < +3.3V 3 ✻ LSB(1) SAMPLING DYNAMICS Conversion Time 16 ✻ Clk Cycles Acquisition Time 4.5 ✻ Clk Cycles Throughput Rate 100 ✻ kHz Clock Frequency Range 0.024 2.4 ✻✻ MHz DYNAMIC CHARACTERISTICS Total Harmonic Distortion VIN = 2.7Vp-p at 1kHz –86 –88 dB SINAD VIN = 2.7Vp-p at 1kHz 84 86 dB Spurious-Free Dynamic Range VIN = 2.7Vp-p at 1kHz 86 88 dB SNR 88 90 dB REFERENCE INPUT Voltage Range 0.5 VCC ✻✻ V Resistance CS = GND, fSAMPLE = 0Hz 5 ✻ G Ω CS = VCC 5 ✻ G Ω Current Drain 20 50 ✻✻ µA CS = VCC 0.1 3 ✻✻ µA DIGITAL INPUT/OUTPUT Logic Family CMOS ✻ Logic Levels: VIH IIH = +5µA 2.0 VCC + 0.3 ✻✻ V VIL IIL = +5µA –0.3 0.8 ✻✻ V VOH IOH = –250µA 2.1 ✻ V VOL IOL = 250µA 0.4 ✻ V Data Format Straight Binary ✻ POWER-SUPPLY REQUIREMENTS VCC Specified Performance 2.7 3.3 ✻✻ V VCC Range(3) 2.0 5.25 ✻✻ V See Note 2 2.0 2.7 ✻✻ V Quiescent Current 650 1300 ✻✻ µA fSAMPLE = 10kHz(4,5) 100 ✻ µA Power Dissipation 1.8 3.8 ✻✻ mW Power-Down CS = VCC 0.3 3 ✻✻ µA TEMPERATURE RANGE Specified Performance –40 +85 ✻✻ °C ✻ Specifications same as ADS8320E. NOTES: (1) LSB means Least Significant Bit. With VREF equal to +2.5V, one LSB is 0.038mV. (2) The maximum clock rate of the ADS8320 is less than 2.4MHz in this power supply range. (3) See the Typical Performance Curves for more information. (4) fCLK = 2.4MHz, CS = VCC for 216 clock cycles out of every 240. (5) See the Power Dissipation section for more information regarding lower sample rates. |
Số phần tương tự - ADS8320EB250G4 |
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Mô tả tương tự - ADS8320EB250G4 |
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