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ADS7828EB2K5G4 bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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ADS7828EB2K5G4 bảng dữ liệu(HTML) 6 Page - Texas Instruments |
6 / 22 page ADS7828 6 SBAS181C www.ti.com Rise Time of SDA Signal tRDA Standard Mode 1000 ns Fast Mode 20 + 0.1CB 300 ns High-Speed Mode, CB = 100pF max(2) 10 80 ns High-Speed Mode, CB = 400pF max(2) 20 160 ns Fall Time of SDA Signal tFDA Standard Mode 300 ns Fast Mode 20 + 0.1CB 300 ns High-Speed Mode, CB = 100pF max(2) 10 80 ns High-Speed Mode, CB = 400pF max(2) 20 160 ns Setup Time for STOP Condition tSU; STO Standard Mode 4.0 µs Fast Mode 600 ns High-Speed Mode 160 ns Capacitive Load for SDA and SCL CB 400 pF Line Pulse Width of Spike Suppressed tSP Fast Mode 50 ns High-Speed Mode 10 ns Noise Margin at the HIGH Level for Standard Mode Each Connected Device (Including VNH Fast Mode 0.2VDD V Hysteresis) High-Speed Mode Noise Margin at the LOW Level for Standard Mode Each Connected Device (Including VNL Fast Mode 0.1VDD V Hysteresis) High-Speed Mode NOTES: (1) All values referred to VIHMIN and VILMAX levels. (2) For bus line loads CB between 100pF and 400pF the timing parameters must be linearly interpolated. (3) A device must internally provide a data hold time to bridge the undefined part between VIH and VIL of the falling edge of the SCLH signal. An input circuit with a threshold as low as possible for the falling edge of the SCLH signal minimizes this hold time. TIMING CHARACTERISTICS(1) (Cont.) At TA = –40°C to +85°C, +VDD = +2.7V, unless otherwise noted. PARAMETER SYMBOL CONDITIONS MIN MAX UNITS |
Số phần tương tự - ADS7828EB2K5G4 |
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Mô tả tương tự - ADS7828EB2K5G4 |
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