LB11620T

No.A0662-11/11

Current detection

resistor

To the RF pin

Pulse input

To the

PWMIN pin

LB11620T Functional Description

1. Output Drive Circuit

The LB11620T adopts direct PWM drive to minimize power loss in the outputs. The output transistors are always

saturated when on, and the motor drive power is adjusted by changing the on duty of the output. The output PWM

switching is performed on the UH, VH, and WH outputs. Since the UL to WL and UH to WH outputs have the same

output form, applications can select either low side PWM or high side PWM drive by changing the way the external

output transistors are connected. Since the reverse recovery time of the diodes connected to the non-PWM side of the

outputs is a problem, these devices must be selected with care. (This is because through currents will flow at the instant

the PWM side transistors turn on if diodes with a short reverse recovery time are not used.)

2. Current Limiter Circuit

The current limiter circuit limits the output current peak value to a level

determined by the equation I = VFR/Rf (VRF = 0.25V typical, Rf: current

detection resistor). This circuit suppresses the output current by reducing

the output on duty.

The current limiter circuit includes an internal filter circuit to prevent

incorrect current limiter circuit operation due to detecting the output diode

reverse recovery current due to PWM operation. Although there should be no problems with the internal filter circuit in

normal applications, applications should add an external filter circuit (such as an RC low-pass filter) if incorrect

operation occurs (if the diode reverse recovery current flows for longer than 1

μs).

3. Notes on the PWM Frequency

The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.

fPWM ≈ 1/(22500 × C)

If a 2000pF capacitor is used, the circuit will oscillate at about 22kHz. If the PWM frequency is too low, switching

noise will be audible from the motor, and if it is too high, the output power loss will increase. Thus a frequency in the

range 15k to 50kHz must be used. The capacitor's ground terminal must be placed as close as possible to the IC’s

ground pin to minimize the influence of output noise and other noise sources.

4. Control Methods

The output duty can be controlled by either of the following methods

⋅ Control based on comparing the EI+ pin voltage to the PWM oscillator waveform

The low side output transistor duty is determined according to the result of comparing the EI+ pin voltage to the PWM

oscillator waveform. When the EI+ pin voltage is 1.35V or lower, the duty will be 0%, and when it is 3.0V or higher,

the duty will be 100%.

When EI+ pin voltage control is used, a low-level input must be applied to the PWMIN pin or that pin connected to

ground.

⋅ Pulse Control Using the PWMIN Pin

A pulse signal can be input to the PWMIN pin, and the output can be controlled based on the duty of that signal.

Note that the output is on when a low level is input to the PWMIN pin, and off when a high level is input. When the

PWMIN pin is open it goes to the high level and the output is turned off. If

inverted input logic is required, this can be implemented with an external

transistor (npn).

When controlling motor operation from the PWMIN pin, the EI+ pin must be

connected to the VREG pin.

Note that since the PWM oscillator is also used as the clock for internal circuits,

a capacitor (about 2000pF) must be connected to the PWM pin even if the

PWMIN pin is used for motor control.