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MC34931EK bảng dữ liệu(PDF) 3 Page - Freescale Semiconductor, Inc

tên linh kiện MC34931EK
Giải thích chi tiết về linh kiện  34931 Industrial
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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Analog Integrated Circuit Device Data
Freescale Semiconductor
3
34931
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 34931 Pin Connections
A functional description of each pin can be found in the Functional Description section beginning on page 11.
Table 1. 34931 Pin Definitions
Pin
Number
Pin
Name
Pin
Function
Formal Name
Definition
2
D1
Logic Input
Disable Input 1
(Active High)
When D1 is logic HIGH, both OUT1 and OUT2 are tri-stated. Schmitt trigger
input with ~80
μA source so default condition = disabled.
3
FB
Analog
Output
Feedback
The load current feedback output provides ground referenced 0.24% of the
high side output current. (Tie to GND through a resistor if not used.)
5
EN/D2
Logic Input
Enable Input
When EN/D2 is logic HIGH the H-bridge is operational. When EN/D2 is logic
LOW, the H-bridge outputs are tri-stated and placed in Sleep mode. (logic
input with ~80
μA sink so default condition = Sleep mode.)
7, 8, 25, 26
VPWR
Power Input
Positive Power
Supply
These pins must be connected together physically as close as possible and
directly soldered down to a wide, thick, low resistance supply plane on the
PCB.
10, 11
OUT1
Power
Output
H-bridge Output 1
Source of HS1 and drain of LS1.
15-18
PGND
Power
Ground
Power Ground
High-current power ground pins must be connected together physically as
close as possible and directly soldered down to a wide, thick, low resistance
ground plane on the PCB.
22, 23
OUT2
Power
Output
H-bridge Output 2
Source of HS2 and drain of LS2.
28
CCP
Analog
Output
Charge Pump
Capacitor
External reservoir capacitor connection for the internal charge pump;
connected to VPWR. Allowable values are 30 nF to 100 nF. Note: This
capacitor is required for the proper performance of the device.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
D1
FB
EN/D2
VPWR
VPWR
VPWR
OUT1
OUT1
PGND
PGND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
32 SOICW-EP
Transparent Top View
SF
IN1
IN2
CCP
VPWR
OUT2
OUT2
PGND
PGND
32
31
30
29
28
27
26
25
24
23
N/C
N/C
AGND


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