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MCP6N11-100 bảng dữ liệu(PDF) 3 Page - Microchip Technology |
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MCP6N11-100 bảng dữ liệu(HTML) 3 Page - Microchip Technology |
3 / 50 page © 2011 Microchip Technology Inc. DS25073A-page 3 MCP6N11 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings † VDD –VSS .......................................................................6.5V Current at Input Pins †† ...............................................±2 mA Analog Inputs (VIP and VIM) †† ..... VSS – 1.0V to VDD +1.0V All Other Inputs and Outputs ......... VSS – 0.3V to VDD +0.3V Difference Input Voltage....................................... |VDD –VSS| Output Short Circuit Current ................................ Continuous Current at Output and Supply Pins ............................±30 mA Storage Temperature ...................................-65°C to +150°C Max. Junction Temperature ........................................ +150°C ESD protection on all pins (HBM, CDM, MM) .≥ 2 kV, 1.5 kV, 300V †Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. †† See Section 4.2.1.2 “Input Voltage Limits” and Section 4.2.1.3 “Input Current Limits”. 1.2 Specifications TABLE 1-1: DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA =+25°C, VDD = 1.8V to 5.5V, VSS = GND, EN/CAL =VDD, VCM =VDD/2, VDM =0V, VREF =VDD/2, VL =VDD/2, RL =10 kΩ to VL and GDM =GMIN; see Figure 1-6 and Figure 1-7. Parameters Sym Min Typ Max Units GMIN Conditions Input Offset Input Offset Voltage, Calibrated VOS -3.0 — +3.0 mV 1 (Note 2) -2.0 — +2.0 mV 2 -0.85 — +0.85 mV 5 -0.50 — +0.50 mV 10 -0.35 — +0.35 mV 100 Input Offset Voltage Trim Step VOSTRM —0.36 — mV 1 —0.21 — mV 2 —0.077 — mV 5 —0.045 — mV 10 —0.014 — mV 100 Input Offset Voltage Drift ΔVOS/ΔTA —±90/GMIN — µV/°C 1 to 10 TA= -40°C to +125°C (Note 3) — ±2.7 — µV/°C 100 Power Supply Rejection Ratio PSRR 62 82 — dB 1 68 88 — dB 2 75 96 — dB 5 81 102 — dB 10 86 112 — dB 100 Note 1: VCM = (VIP + VIM) / 2, VDM = (VIP – VIM) and GDM = 1 + RF/RG. 2: The VOS spec limits include 1/f noise effects. 3: This is the input offset drift without VOS re-calibration; toggle EN/CAL to minimize this effect. 4: These specs apply to both the VIP, VIM input pair (use VCM) and to the VREF, VFG input pair (VREF takes VCM’s place). 5: This spec applies to the VIP, VIM, VREF and VFG pins individually. 6: Figure 2-11 and Figure 2-19 show the VIVR and VDMR variation over temperature. 7: See Section 1.5 “Explanation of DC Error Specs”. |
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