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ADG621BRM bảng dữ liệu(PDF) 1 Page - Analog Devices

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CMOS ±5 V/+5 V,
4 Ω Dual SPST Switches
ADG621/ADG622/ADG623
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for its use,norforanyinfringements ofpatents or other
rightsofthirdpartiesthat mayresult fromitsuse.Specificationssubjecttochangewithoutnotice. No
license isgranted by implication or otherwise under anypatent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2001–2009 Analog Devices, Inc. All rights reserved.
FEATURES
5.5 Ω (maximum) on resistance
0.9 Ω (maximum) on resistance flatness
2.7 V to 5.5 V single supply
±2.7 V to ±5.5 V dual supply
Rail-to-rail operation
10-lead MSOP package
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avionics
Relay replacements
Battery-powered systems
GENERAL DESCRIPTION
The ADG621/ADG622/ADG623 are monolithic, CMOS,
single-pole, single-throw (SPST) switches. Each switch of the
ADG621/ADG622/ADG623 conducts equally well in both
directions when on.
The ADG621/ADG622/ADG623 contain two independent
switches. The ADG621 and ADG622 differ only in that both
switches are normally open and normally closed. In the ADG623,
Switch 1 is normally open, and Switch 2 is normally closed. The
ADG623 exhibits break-before-make switching action.
The ADG621/ADG622/ADG623 offer low on resistance of
4 Ω, which is matched to within 0.25 Ω between channels.
These switches also provide low power dissipation yet give
high switching speeds. The ADG621/ADG622/ADG623 are
available in a 10-lead MSOP package.
FUNCTIONAL BLOCK DIAGRAMS
ADG621
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 1.
ADG622
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 2.
ADG623
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 3.
PRODUCT HIGHLIGHTS
1. Low on resistance, RON (4 Ω typical).
2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V.
3. Low power dissipation; CMOS construction ensures low
power dissipation.
4. Tiny 10-lead MSOP package.


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