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AD7836AS bảng dữ liệu(PDF) 11 Page - Analog Devices

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AD7836
–11–
REV. A
Automated Test Equipment
The AD7836 is particularly suited for use in an automated test
environment. Figure 21 shows the AD7836 providing the nec-
essary voltages for the pin driver and the window comparator in
a typical ATE pin electronics configuration. AD588s are used
to provide reference voltages for the AD7836. In the configu-
ration shown, the AD588s are configured so that the voltage at
Pin 1 is 5 V greater than the voltage at Pin 9 and the voltage at
Pin 15 is 5 V less than the voltage at Pin 9.
*ADDITIONAL PINS OMITTED FOR CLARITY
4
6
8
13
7
3
1
15
14
9
16
2
10 11 12
1 F
+15V –15V
0.1 F
AD588
4
6
8
13
7
3
1
15
14
16
2
10
11
12
1 F
+15V –15V
AD588
8
DEVICE
GND
TO TESTER
WINDOW
COMPARATOR
–15V
+15V
VREF(+)A/B
VREF(–)A/B
DUTGND A/B
VREF(+)C/D
VREF(–)C/D
AD7836*
VOUTA
VOUTB
VOUTC
VOUTD
DUTGND C/D
AGND
VOUT
VOFFSET
DEVICE
GND
DEVICE
GND
PIN
DRIVER
Figure 21. ATE Application
One of the AD588s is used as a reference for DACs 1 and 2.
These DACs are used to provide high and low levels for the pin
driver. The pin driver may have an associated offset. This can
be nulled by applying an offset voltage to Pin 9 of the AD588.
First, the code 1000 . . . 0000 is loaded into the DACA latch
and the pin driver output is set to the DACA output. The
VOFFSET voltage is adjusted until 0 V appears between the pin
driver output and DUT GND. This causes both VREF(+) and
VREF(–) to be offset with respect to AGND by an amount equal
to VOFFSET. However, the output of the pin driver will vary
from –10 V to +10 V with respect to DUT GND as the DAC
input code varies from 000 . . . 000 to 111 . . . 111. The
VOFFSET voltage is also applied to the DUTGND pins. When a
clear is performed on the AD7836, the output of the pin driver
will be 0 V with respect to Device GND.
The other AD588 is used to provide a reference voltage for
DACs C and D. These provide the reference voltages for the
window comparator shown in the diagram. Note that Pin 9 of
this AD588 is connected to Device GND. This causes
VREF(+)C & D and VREF(–)C & D to be referenced to Device
GND. As DAC 3 and DAC 4 input codes vary from
000 . . . 000 to 111 . . . 111, VOUT3 and VOUT4 vary from –10 V
to +10 V with respect to Device GND. Device GND is also
connected to DUTGND. When the AD7836 is cleared,
VOUTC and VOUTD are cleared to 0 V with respect to DEVICE
GND.
TrimDAC is a registered trademark of Analog Devices, Inc.
Programmable Reference Generation for the AD7836 in an
ATE Application
The AD7836 is particularly suited for use in an automated test
environment. The reference input for the AD7836 quad 14-bit
DAC requires two references for each DAC. Programmable
references may be a requirement in some ATE applications as
the offset and gain errors at the output of each DAC can be ad-
justed by varying the voltages on the reference pins of the DAC.
To trim offset errors, the DAC is loaded with the digital code
000 . . . 000 and the voltage on the VREF(–) pin is adjusted until
the desired negative output voltage is obtained. To trim out
gain errors, first the offset error is trimmed. Then the DAC is
loaded with the code 111 . . . 111 and the voltage on the
VREF(+) pin is adjusted until the desired full scale voltage
minus one LSB is obtained.
It is not uncommon in ATE design, to have other circuitry at
the output of the AD7836 that can have offset and gain errors
of up to say
±300 mV. These offset and gain errors can be eas-
ily removed by adjusting the reference voltages of the AD7836.
The AD7836 uses nominal reference values of
±5 V to achieve
an output span of
±10 V. Since the AD7836 has a gain of two
from the reference inputs to the DAC output, adjusting the ref-
erence voltages by
±150 mV will adjust the DAC offset and
gain by
±300 mV.
There are a number of suitable 8- and 10-bit DACs available
that would be suitable to drive the reference inputs of the
AD7836, such as the AD7804 which is a quad 10-bit digital-to-
analog converter with serial load capabilities. The voltage out-
put from this DAC is in the form of VBIAS
± VSWING and rail to
rail operation is achievable. The voltage reference for this DAC
can be internally generated or provided externally. This DAC
also contains an 8-bit SUB DAC which can be used to shift the
complete transfer function of each DAC around the VBIAS
point. This can be used as a fine trim on the output voltage. In
this Application two AD7804s are required to provide program-
mable reference capability for all four DACs. One AD7804 is
used to drive the VREF(+) pins and the second package used to
drive the VREF(–) pins.
Another suitable DAC for providing programmable reference
capability is the AD8803. This is an octal 8-bit trimDAC
® and
provides independent control of both the top and bottom ends
of the trimDAC. This is helpful in maximizing the resolution of
devices with a limited allowable voltage control range.
The AD8803 has an output voltage range of GND to VDD (0 V to
+5 V). To trim the VREF(+) input, the appropriate trim range
on the AD8803 DAC can be set using the VREFL and VREFH
pins allowing 8 bits of resolution between the two points. This
will allow the VREF(+) pin to be adjusted to remove gain errors.
To trim the VREF(–) voltage, some method of providing a trim
voltage in the required negative voltage range is required. Nei-
ther the AD7804 or the AD8803 can provide this range in nor-
mal operation as their output range is 0 V to +5 V. There are
two methods of producing this negative voltage. One method is
to provide a positive output voltage and then to level shift that
analog voltage to the required negative range. Alternatively


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174Kb / 12P
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