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74FCT2543ATSOCTG4 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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1 / 14 page CY74FCT2543T 8-BIT LATCHED TRANSCEIVER WITH 3-STATE OUTPUTS SCCS042C – SEPTEMBER 1994 – REVISED NOVEMBER 2001 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Function and Pinout Compatible With FCT and F Logic D 25-W Output Series Resistors to Reduce Transmission-Line Reflection Noise D Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D Matched Rise and Fall Times D Fully Compatible With TTL Input and Output Logic Levels D 12-mA Output Sink Current 15-mA Output Source Current D Separation Controls for Data Flow in Each Direction D Back-to-Back Latches for Storage D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) D 3-State Outputs description The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs permit each latch set to have independent control of inputting and outputting in either direction of data flow. For example, for data flow from A to B, the A-to-B enable (CEAB) input must be low to enter data from A or to take data from B, as indicated in the function table. With CEAB low, a low signal on the A-to-B latch enable (LEAB) input makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both low, the 3-state B output buffers are active and reflect data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB, LEAB, and OEAB inputs. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2543T can replace the CY74FCT543T to reduce noise in an existing design. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Q OR SO PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 LEBA OEBA A0 A1 A2 A3 A4 A5 A6 A7 CEAB GND VCC CEBA B0 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB |
Số phần tương tự - 74FCT2543ATSOCTG4 |
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Mô tả tương tự - 74FCT2543ATSOCTG4 |
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