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ADG212AKPZ-REEL bảng dữ liệu(PDF) 9 Page - Analog Devices

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Giải thích chi tiết về linh kiện  LC2MOS Quad SPST Switches
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ADG212AKPZ-REEL bảng dữ liệu(HTML) 9 Page - Analog Devices

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Data Sheet
ADG211A/ADG212A
Rev. C | Page 9 of 16
TERMINOLOGY
RON
Ohmic resistance between the out and S terminals.
RON Match
Difference between the RON of any two channels.
IS (Off)
Source terminal leakage current when the switch is off.
ID (Off)
Drain terminal leakage current when the switch is off.
ID (On)
Leakage current that flows from the closed switch into the body.
VD (VS)
Analog voltage on the D, S terminals.
CS (Off)
Switch input capacitance off condition.
CD (Off)
Switch output capacitance off condition.
CIN
Digital input capacitance.
CD, CS (On)
Input or output capacitance when the switch is on.
tON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tOPEN
Off time measured between 50% points of both switches, which
are connected as a multiplexer when switching from one
address state to another.
VINL
Maximum input voltage for a logic low.
VINH
Minimum input voltage for a logic high.
IINL (IINH)
Input current of the digital input.
VDD
Most positive voltage supply.
VSS
Most negative voltage supply.
VL
Logic supply voltage.
IDD
Positive supply current.
ISS
Negative supply current.


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