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ADS42JB69 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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ADS42JB69 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
3 / 70 page ADS42JB49 ADS42JB69 www.ti.com SLAS900C – OCTOBER 2012 – REVISED JULY 2013 RECOMMENDED OPERATING CONDITIONS (1) Over operating free-air temperature range, unless otherwise noted. PARAMETER MIN NOM MAX UNIT SUPPLIES AVDD Analog supply voltage 1.7 1.8 1.9 V AVDD3V Analog buffer supply voltage 3.15 3.3 3.45 V DRVDD Digital supply voltage 1.7 1.8 1.9 V IOVDD Output buffer supply voltage 1.7 1.8 1.9 V ANALOG INPUTS Default after reset 2 VPP VID Differential input voltage range Register programmable(2) 2.5 VPP VICR Input common-mode voltage VCM ± 0.025 V Maximum analog input frequency with 2.5-VPP input amplitude 250 MHz Maximum analog input frequency with 2-VPP input amplitude 400 MHz CLOCK INPUT 10x mode 60 250 MSPS Input clock sample rate 20x mode 40 156.25 MSPS Sine wave, ac-coupled 0.3(3) 1.5 VPP LVPECL, ac-coupled 1.6 VPP Input clock amplitude differential (VCLKP – VCLKM) LVDS, ac-coupled 0.7 VPP LVCMOS, single-ended, ac-coupled 1.5 V Input clock duty cycle 35% 50% 65% DIGITAL OUTPUTS CLOAD Maximum external load capacitance from each output pin to DRGND 3.3 pF RLOAD Single-ended load resistance +50 Ω TA Operating free-air temperature –40 +85 °C (1) After power-up, to reset the device for the first time, use the RESET pin only. Refer to the Register Initialization section. (2) For details, refer to the Digital Gain section. (3) Refer to the Performance vs Clock Amplitude curves, Figure 32 and Figure 33. Table 1. High-Frequency Modes Summary REGISTER ADDRESS VALUE DESCRIPTION Dh 90h High-frequency modes should be enabled for input frequencies greater than 250 MHz. Eh 90h High-frequency modes should be enabled for input frequencies greater than 250 MHz. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: ADS42JB49 ADS42JB69 |
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