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ADC128D818CIMT-NOPB bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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ADC128D818CIMT-NOPB bảng dữ liệu(HTML) 2 Page - Texas Instruments |
2 / 40 page ESD Clamp 1 2 SDA 3 SCL 4 GND 5 6 7 A1 8 V+ 16 15 14 13 12 11 10 9 ADC128D818 16-pin TSSOP IN7 VREF IN6 IN5 IN4 IN3 IN2 IN1 IN0 A0 INT SDA SCL A0 A1 INT IN7 (+) I 2 C Interface and Control Interrupt Masking and Interrupt Control ADC128D818 12-bit Delta-Sigma ADC Internal VREF = +2.56V Temperature Sensor Interrupt Status Registers GND VREF V+ Single-Ended Positive Voltage LM94022 Shutdown DC-DC 10VIN VOUT Margining Voltage IN0 IN1 IN2 IN3 Pseudo-Differential Positive Voltage IN4 (+) IN5 (-) IN6 (-) RTRACE ADC128D818 SNAS483E – FEBRUARY 2010 – REVISED MARCH 2013 www.ti.com Typical Application Connection Diagram PIN DESCRIPTIONS Pin Pin ESD Type Description Number Name(s) Structure ADC external reference. ADC128D818 allows two choices for sourcing VREF: internal or external. If the +2.56V internal VREF is used, leave this pin unconnected. If the external VREF is used, 1 VREF Analog Input source this pin with a voltage between +1.25V and V+. At Power-On-Reset (POR), the default setting is the internal VREF. Bypass with the parallel combination of 1 μF (electrolytic or tantalum) and 0.1 μF (ceramic) capacitors. Serial Bus Bidirectional Data. NMOS open-drain output. 2 SDA Digital I/O Requires external pull-up resistor to function properly. Serial Bus Clock. Requires external pull-up resistor to 3 SCL Digital Input function properly. 4 GND GROUND Internally connected to all of the circuitry. +3.0V to +5.5V power. Bypass with the parallel combination 5 V+ POWER of 1 μF (electrolytic or tantalum) and 0.1 μF (ceramic) bypass capacitors. 2 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: ADC128D818 |
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