OBSOLETE

LMX2306, LMX2316, LMX2326

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SNAS016G – MAY 2000 – REVISED APRIL 2013

FUNCTION AND INITIALIZATION LATCHES

Both the function and initialization latches write to the same registers. (See DEVICE PROGRAMMING AFTER

FIRST APPLYING Vcc section for initialization latch description.)

Table 1. Programmable Modes

C1

C2

F1

F2

F3–5

F6

F7

F8

0

1

COUNTER

POWER DOWN

FoLD

PD

CP

FASTLOCK

RESET

CONTROL

POLARITY

TRI-STATE

ENABLE

F9

F10

F11–14

F15–F17

F18

F19

FAST-

TIMEOUT

TIMEOUT

TEST

POWER

TEST

LOCK

COUNTER

COUNTER

MODES

DOWN

MODE

CONTROL

ENABLE

VALUE

MODE

Table 2. Mode Select Truth Table

PHASE

REGISTER

COUNTER

POWER

CP

DETECTOR

LEVEL

RESET

DOWN

TRI-STATE

POLARITY

0

RESET

POWERED

NEGATIVE

NORMAL

DISABLED

UP

OPERATION

1

RESET

POWERED

POSITIVE

TRI-STATE

ENABELED

DOWN

Function Description

F1. The Counter Reset enable mode bit F1, when activated, allows the reset of both N and R counters. Upon

powering up, the F1 bit needs to be disabled, then the N counter resumes counting in “close” alignment with the

R counter. (The maximum error is one prescalar cycle).

F2. Refer to Powerdown Operation section.

F3–5. Controls output of FoLD pin. See FoLD truth table. See Table 4.

F6. Phase Detector Polarity. Depending upon VCO characteristics, F6 bit should be set accordingly. When

VCO characteristics are positive F6 should be set HIGH; When VCO characteristics are negative F6 should be

set LOW

F7. Charge Pump Tri-state is set using bit F7. For normal operation this bit is set to zero.

F8. When the FastLock Enable bit is set the part is forced into one of the four FastLock modes. See description

in Table 5, FastLock Decoding.

F9. The FastLock Control bit determines the mode of operation when in FastLock (F8 = 1). When not in

F10. Timeout Counter Enable bit is set to 1 to enable the timeout counter. See Table 5 for truth table.

F11–14. FastLock Timeout Counter is set using bits F11-14. Table 6 for counter values.

F15–17. Function bits F15–F17 are for Test Modes, and should be set to 0 for normal use.

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