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MCP2030 bảng dữ liệu(PDF) 5 Page - Microchip Technology |
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MCP2030 bảng dữ liệu(HTML) 5 Page - Microchip Technology |
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5 / 66 page  2005-2013 Microchip Technology Inc. DS21981B-page 5 MCP2030 Demodulator Discharge Time (delay time of demodulated output to fall) TDF —50 — sV DD = 3.0V MOD depth setting = 33% Input conditions: Amplitude = 300 mVPP Modulation depth = 100% Rise time of LFDATA TRLFDATA —0.5 — sV DD 3.0V. Time is measured from 10% to 90% of amplitude Fall time of LFDATA TFLFDATA —0.5 — sV DD 3.0V Time is measured from 10% to 90% of amplitude AGC stabilization time (TAGC + TPAGC) TSTAB 4—— ms AGC initialization time TAGC —3.5 — ms High time after AGC initialization time TPAGC —62.5 — s Gap time after AGC stabilization time TGAP 200 — — s Time element of pulse TE 100 — — s Minimum pulse width Time from exiting Sleep or POR to being ready to receive signal TRDY —— 50* ms Minimum time AGC level must be held after receiving AGC Preserve command TPRES 5* — — ms AGC level must not change more than 10% during TPRES. Internal RC oscillator frequency FOSC 27 32 35.5 kHz Internal clock trimmed at 32 kHz during test Inactivity timer time-out TINACT 13.5 16 17.75 ms 512 cycles of RC oscillator @ FOSC Alarm timer time-out TALARM 27 32 35.5 ms 1024 cycles of RC oscillator @ FOSC LC Pin Input Resistance for LCX, LCY, LCZ pins RIN — 800* — k LCCOM grounded, VDD = 3V, FCARRIER = 125 kHz. LC Pin Input Parasitic Capacitance for LCX, LCY, LCZ pins CIN —24* — pF LCCOM grounded, VDD = 3V, FCARRIER = 125 kHz. Minimum output enable filter high time OEH (Bits Config0<8:7>) 01 = 1 ms 10 = 2 ms 11 = 4 ms 00 = Filter Disabled TOEH 32 (~1 ms) 64 (~2 ms) 128 (~4 ms) — — — — — — — — — clock count RC oscillator = FOSC (see FOSC specification for variations). Viewed from the pin input: (Note 1) Minimum output enable filter low time OEL (Bits Config0<6:5>) 00 = 1 ms 01 = 1 ms 10 = 2 ms 11 = 4 ms TOEL 32 (~1 ms) 32 (~1 ms) 64 (~2 ms) 128 (~4 ms) — — — — — — — — clock count RC oscillator = FOSC Viewed from the pin input: (Note 2) Maximum output enable filter period OEH OEL TOEH TOEL 01 00 = 1 ms 1 ms (Filter 1) 01 01 = 1 ms 1 ms (Filter 1) 01 10 = 1 ms 2 ms (Filter 2) 01 11 = 1 ms 4 ms (Filter 3) TOET — — — — — — — — 96 (~3 ms) 96 (~3 ms) 128 (~4 ms) 192 (~6 ms) clock count RC oscillator = FOSC 10 00 = 2 ms 1 ms (Filter 4) 10 01 = 2 ms 1 ms (Filter 4) 10 10 = 2 ms 2 ms (Filter 5) 10 11 = 2 ms 4 ms (Filter 6) — — — — — — — — 128 (~4 ms) 128 (~4 ms) 160 (~5 ms) 250 (~8 ms) 11 00 = 4 ms 1 ms (Filter 7) 11 01 = 4 ms 1 ms (Filter 7) 11 10 = 4 ms 2 ms (Filter 8) 11 11 = 4 ms 4 ms (Filter 9) — — — — — — — — 192 (~6 ms) 192 (~6 ms) 256 (~8 ms) 320 (~10 ms) 00 XX = Filter Disabled — — — LFDATA output appears as long as input signal level is greater than VSENSE. AC Characteristics (Continued) Electrical Specifications: Standard Operating Conditions (unless otherwise stated) Supply Voltage 2.0V V DD 3.6V Operating temperature -40°C T A +85°C LCCOM connected to VSS LC Signal Input Sinusoidal 300 mVPP Carrier Frequency 125 kHz LCCOM connected to VSS Parameters Sym. Min. Typ† Max. Units Conditions * Parameter is characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Required output enable filter high time must account for input path analog delays (= TOEH - TDR + TDF). 2: Required output enable filter low time must account for input path analog delays (= TOEL + TDR - TDF). |
Số phần tương tự - MCP2030_13 |
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Mô tả tương tự - MCP2030_13 |
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