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FDD603AL bảng dữ liệu(PDF) 1 Page - Fairchild Semiconductor

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FDD603AL, Rev. B
July 1999
1999 Fairchild Semiconductor Corporation
G
S
D
TO-252
S
D
G
FDD603AL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
Features
• 33 A, 30 V. R
DS(ON) = 0.023 Ω @ VGS = 10 V
R
DS(ON) = 0.037 Ω @ VGS = 4.5 V.
• Critical DC electrical parameters specified at elevated
temperature.
• Rugged avalanche-rated internal source-drain diode
can eliminate the need for external Zener Diode.
• High density cell design for extremely low R
DS(ON) .
Absolute Maximum Ratings
TC=25
oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
30
V
VGSS
Gate-Source Voltage
±20
V
ID
Maximum Drain Current - Continuous
(Note 1)
33
TA = 25
°C
(Note 1a)
9.5
Maximum Drain Current
-Pulsed
80
A
Maximum Power Dissipation @ TC = 25
oC
(Note 1)
39
TA = 25
oC
(Note 1a)
3.2
PD
TA = 25
oC
(Note 1b)
1.3
W
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
R
θJC
Thermal Resistance, Junction-to-Case
(Note 1)
2.5
°C/W
40
°C/W
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
96
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape W idth
Quantity
FDD603AL
FDD603AL
13’’
16mm
2500
General Description
This N-Channel logic level enhancement mode power
field effect transistor is produced using Fairchild’s
proprietary, high cell density, DMOS technology. This
very high density process is tailored to minimize on-
state resistance. These devices are particularly suited
for low voltage applications such as DC/DC converters
and high efficiency switching circuits where fast
switching, low in-line power loss, and resistance to
transients are needed.
Applications
• DC/DC converters
• Motor drives


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