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FDC634P bảng dữ liệu(PDF) 1 Page - Fairchild Semiconductor

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Giải thích chi tiết về linh kiện  P-Channel Enhancement Mode Field Effect Transistor
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November 1997
FDC634P
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
Absolute Maximum RatingsT
A = 25°C unless otherwise note
Symbol Parameter
FDC634P
Units
V
DSS
Drain-Source Voltage
-20
V
V
GSS
Gate-Source Voltage - Continuous
±8
V
I
D
Drain Current - Continuous
(Note 1a)
-3.5
A
- Pulsed
-11
P
D
Maximum Power Dissipation
(Note 1a)
1.6
W
(Note 1b)
0.8
T
J,TSTG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
30
°C/W
FDC634P Rev.C
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. These devices are particularly suited
for low voltage applications such as cellular phone and
notebook computer power management and other battery
powered circuits where high-side switching, and low in-line
power loss are needed in a very small outline surface
mount package.
-3.5 A, -20 V. R
DS(ON) = 0.080
@ V
GS = -4.5 V
R
DS(ON) = 0.110
@ V
GS = -2.5 V.
SuperSOT
TM-6 package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON).
Exceptional on-resistance and maximum DC current
capability.
SOIC-16
SOT-23
SuperSOT
TM-8
SO-8
SOT-223
SuperSOT
TM-6
D
D
D
S
D
G
SuperSOT
-6
TM
.634
pin 1
3
5
6
4
1
2
3
© 1997 Fairchild Semiconductor Corporation


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