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FDC6301N bảng dữ liệu(PDF) 1 Page - Fairchild Semiconductor |
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FDC6301N bảng dữ liệu(HTML) 1 Page - Fairchild Semiconductor |
1 / 4 page July 1997 FDC6301N Dual N-Channel , Digital FET General Description Features Absolute Maximum Ratings T A = 25 oC unless other wise noted Symbol Parameter FDC6301N Units V DSS, VCC Drain-Source Voltage, Power Supply Voltage 25 V V GSS, VIN Gate-Source Voltage, V IN 8 V I D, IOUT Drain/Output Current - Continuous 0.22 A - Pulsed 0.5 P D Maximum Power Dissipation (Note 1a) (Note 1b) 0.9 W 0.7 T J,TSTG Operating and Storage Temperature Range -55 to 150 °C ESD Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm) 6.0 kV THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 140 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W FDC6301N Rev.C 25 V, 0.22 A continuous, 0.5 A Peak. R DS(ON) = 5 Ω @ VGS= 2.7 V R DS(ON) = 4 Ω @ VGS= 4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. V GS(th) < 1.5V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model. These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild 's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, these N-Channel FET's can replace several digital transistors, with a variety of bias resistors. D S G IN GND Vcc INVERTER APPLICATION OUT Mark: .301 1 5 4 2 3 6 SOT-23 SuperSOT TM-8 SOIC-16 SO-8 SOT-223 SuperSOT TM-6 © 1997 Fairchild Semiconductor Corporation |
Số phần tương tự - FDC6301N |
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Mô tả tương tự - FDC6301N |
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