công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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CD40193BCM bảng dữ liệu(PDF) 4 Page - Fairchild Semiconductor |
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CD40193BCM bảng dữ liệu(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page www.fairchildsemi.com 4 AC Electrical Characteristics (Note 3) TA = 25°C, CL = 50 pF, RL = 200 kΩ, input tr = tf = 20 ns, unless otherwise specified. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note, AN-90. Symbol Parameter Conditions Min Typ Max Units tPHL or tPLH Propagation Delay Time VDD = 5V 250 400 ns from Count Up or VDD = 10V 100 160 ns Count Down to Q VDD = 15V 80 130 ns tPHL or tPLH Propagation Delay Time VDD = 5V 120 200 ns from Count Up to Carry VDD = 10V 50 80 ns VDD = 15V 40 65 ns tPHL or tPLH Propagation Delay Time VDD = 5V 120 200 ns from Count Down VDD = 10V 50 80 ns to Borrow VDD = 15V 40 65 ns tSU Time Prior to Load VDD = 5V 100 160 ns That Data Must VDD = 10V 30 50 ns Be Present VDD = 15V 25 40 ns tPHL Propagation Delay Time VDD = 5V 130 220 ns from Clear to Q VDD = 10V 60 100 ns VDD = 15V 50 80 ns tPLH or tPHL Propagation Delay Time VDD = 5V 300 480 ns from Load to Q VDD = 10V 120 190 ns VDD = 15V 95 150 ns tTLH or tTHL Output Transition Time VDD = 5V 100 200 ns VDD = 10V 50 100 ns VDD = 15V 40 80 ns fCL Maximum Count Frequency VDD = 5V 2.5 4 MHz VDD = 10V 6 10 MHz VDD = 15V 7.5 12.5 MHz trCL or t fCL Maximum Count Rise VDD = 5V 15 µs or Fall Time VDD = 10V 5 µs VDD = 15V 1 µs tWH, tWL Minimum Count Pulse VDD = 5V 120 200 ns Width VDD = 10V 35 80 ns VDD = 15V 28 65 ns tWH Minimum Clear VDD = 5V 300 480 ns Pulse Width VDD = 10V 120 190 ns VDD = 15V 95 150 ns tWL Minimum Load VDD = 5V 100 160 ns Pulse Width VDD = 10V 40 65 ns VDD = 15V 32 55 ns CIN Average Input Capacitance Load and Data 5 7.5 pF Inputs (A,B,C,D) Count Up, Count 10 15 pF Down and Clear CPD Power Dissipation Capacity (Note 5) 100 pF |
Số phần tương tự - CD40193BCM |
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Mô tả tương tự - CD40193BCM |
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