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AD698APZ bảng dữ liệu(PDF) 11 Page - Analog Devices |
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AD698APZ bảng dữ liệu(HTML) 11 Page - Analog Devices |
11 / 12 page AD698 REV. B –11– VOUT = 2 × R S RG + 1 ×V IN Solving for VOUT/VIN = 400 and setting RG = 100 Ω then: RS = [400 – 1] × R G/2 = 19.95 k Ω Choose an oscillator amplitude that is in the range of 1 V to 3.5 V rms. For an input excitation level of 3 V rms, the output signal from the amplifier gain stage will be 3.5 V rms × 0.8 V or 2.4 V rms, which is in the acceptable range. Since A/B is known, the value of R2, the output FS resistor may be chosen by the formula: VOUT = A/B × 500 µA × R2 For a 10 V output at FS, with an A/B of 0.8; solve for R2. R2 = 10 V [0.8 × 500 µA] = 25.0 kΩ This will result in a VOUT of 10 V for a full-scale signal from the bridge. The other components, C1, C2, C3, C4 may be selected by following the guidelines on general device operation men- tioned earlier. If a gain trim is required, then a trim resistor can be used to ad- just either R2 or RG. Bridge offsets should be adjusted by a trim network on the OFFSET 1 and OFFSET 2 pins of the AD698. R1 C1 C2 C3 R4 R3 C4 R2 1000pF SIGNAL REFERENCE RL VOUT 100nF 6.8µF –15V +15V 100nF 6.8µF AB C D PHASE LAG/LEAD NETWORK 13 16 15 14 24 23 22 21 20 19 18 17 12 11 10 9 8 1 2 3 4 7 6 5 AD698 –VS EXC1 EXC2 LEV1 LEV2 FREQ1 BFILT1 BFILT2 –BIN +BIN –AIN FREQ2 SIG REF OFFSET2 OFFSET1 +VS OUT FILT FEEDBACK SIG OUT –ACOMP AFILT2 AFILT1 +ACOMP +AIN A2 RS A1 RS RESISTORS, INDUCTORS OR CAPACITORS RT AB CD PHASE LEAD RS C C RS RS RT A B CD PHASE LAG C PHASE LAG = Arc Tan (Hz RC); PHASE LEAD = Arc Tan 1/(Hz RC) WHERE R = RS// (RS + RT) RG DUAL OP AMP Figure 20. AD698 Interconnection Diagram for AC Bridge Applications |
Số phần tương tự - AD698APZ |
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Mô tả tương tự - AD698APZ |
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