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74LCX86MTC bảng dữ liệu(PDF) 1 Page - Fairchild Semiconductor |
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74LCX86MTC bảng dữ liệu(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2005 Fairchild Semiconductor Corporation DS012415 www.fairchildsemi.com March 1995 Revised February 2005 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs General Description The LCX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX86 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs s 2.3V–3.6V VCC specifications provided s 6.5 ns tPD max (VCC 3.3V), 10 PA ICC max s Power down high impedance inputs and outputs s r24 mA output drive (VCC 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Machine model ! 2000V Human model ! 200V Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Order Number Package Number Package Description 74LCX86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX86SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX86MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description A0–A3 Inputs B0–B3 Inputs O0–O3 Outputs |
Số phần tương tự - 74LCX86MTC |
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Mô tả tương tự - 74LCX86MTC |
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